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(2)
DMA source address registers L0 to L3 (DSAL0 to DSAL3)
These registers can be read/written in 16-bit units.
Figure 6-3: DMA Source Address Registers L0 to L3 (DSAL0 to DSAL3)
15
14
13
DSAL0
SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 FFFFF080H undef.
15
14
13
DSAL1
SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 FFFFF088H undef.
15
14
13
DSAL2
SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 FFFFF090H undef.
15
14
13
DSAL3
SA15 SA14 SA13 SA12 SA11 SA10 SA9 SA8 SA7 SA6 SA5 SA4 SA3 SA2 SA1 SA0 FFFFF098H undef.
Bit Position
Bit Name
15 to 0
SA15 to
SA0
166
Chapter 6 DMA Functions (DMA Controller)
12
11
10
9
8
12
11
10
9
8
12
11
10
9
8
12
11
10
9
8
Sets the DMA source address (A15 to A0). During DMA transfer, it stores the next
DMA transfer source address.
Preliminary User's Manual U14913EE1V0UM00
7
6
5
4
3
7
6
5
4
3
7
6
5
4
3
7
6
5
4
3
Function
2
1
0
Address
2
1
0
Address
2
1
0
Address
2
1
0
Address
Initial
value
Initial
value
Initial
value
Initial
value
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