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Figure 5-4: On-Page/Off-Page Judgment during Page ROM Connection (2/2)
(c) In case of 32-Mbit (2 M × 16 bits) page ROM (16-word page access)
Internal address latch
(immediately preceding
address)
V850E/CA1
address output
156
Chapter 5 Memory Access Control Function
a23
a22
a21
a20
Comparison
A23
A22
A21
A20
Page ROM address
A19
Preliminary User's Manual U14913EE1V0UM00
a7
a6
a5
MA6
MA5
0
0
A7
A6
A5
A6
A5
A4
Off-page address
a4
a3
MA4
MA3
PRC register setting
1
1
A4
A3
A2
A1
A1
A0
A3
A2
On-page address
Continuous reading possible:
16-bit data bus width × 16 words
A0
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