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(8)
TMRn option register 0 (TRnOPT0)
The TRnOPT0 register is an 8-bit register that sets the capture/compare operation and detects
overflow.
This register can be read and written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
Caution:
When TR1CE = 1, do not rewrite bits TR1CCS3 to TR1CCS0.
Figure 10-19: TMRn Option Register 0 (TRnOPT0) (1/2)
After reset:
00H
7
TR0OPT0
0
After reset:
00H
7
TR1OPT0
TR1CCS3 TR1CCS2 TR1CCS1 TR1CCS0
TR1CCS3
0
1
Remark: Bit TR1CCS3 is only valid in the free-running mode. In all other modes, this bit
TR1CCS2
0
1
Remark: Bit TR1CCS2 is only valid in the free-running mode. In all other modes, this bit
TR1CCS1
0
1
Remark: Bit TR1CCS1 is only valid in the free-running mode. In all other modes, this bit
TR1CCS0
0
1
Remark: Bit TR1CCS0 is only valid in the free-running mode. In all other modes, this bit
Remark:
n = 0, 1
Chapter 10 16-bit Inverter Timer/Counter R
R/W
Address:
6
5
0
0
R/W
Address:
6
5
TR1CCR3 register capture/compare selection
Select compare register
Select capture register
is invalid.
TR1CCR2 register capture/compare selection
Select compare register
Select capture register
is invalid.
TR1CCR1 register capture/compare selection
Select compare register
Select capture register
is invalid.
TRnCCR0 register capture/compare selection
Select compare register
Select capture register
is invalid.
User's Manual U16580EE3V1UD00
FFFFF587H
4
3
2
0
0
TR0CMS TR0CUF
FFFFF5C7H
4
3
2
0
TR1CMS TR1CUF
1
0
TR0OVF
1
0
TR1OVF
333
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