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counter
TQnCCR0
CCR0 buffer
register
TQnCCR1
CCR1 buffer
register
TQnCCR2
CCR2 buffer
register
TQnCCR3
CCR3 buffer
register
TOQn0
TOQn1
TOQn2
TOQn3
Remarks: 1. D10: Setting value of TQnCCR0 register (0000H to FFFFH)
340
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Chapter 8 16-Bit Timer/Event Counter Q
Figure 8-27: Basic Operation Timing in PWM Mode (1/2)
(a) When rewriting values of TQnCCR1 to TQnCCR3 registers
TQnCE = 1
FFFFH
D
31
16-bit
D
11
0000H
D
11
0000H
D
11
D
21
0000H
D
31
0000H
D
31
D11, D12, D13: Setting values of TQnCCR1 register (0000H to FFFFH)
D21, D22: Setting values of TQnCCR2 register (0000H to FFFFH)
D31, D32, D33: Setting values of TQnCCR3 register (0000H to FFFFH)
2. Duty of TOQnk output = (Set value of TQnCCRk register) / (Set value of TQnCCR0
register)
Cycle of TOQnk output = (Set value of TQnCCR0 register) × (Count clock cycle)
Toggle width of TOQn0 output = (Set value of TQnCCR0 register + 1) × (Count clock
cycle)
3. n = 0 to 1
m = 0 to 3
k = 1 to 3
D
01
D
D
21
D
32
D
12
D
01
D
01
D
12
D
12
D
21
D
32
User's Manual U16702EE3V2UD00
D
D
01
21
D
32
D
12
D
22
Same value write
D
12
D
12
D
22
D
22
D
32
01
D
13
D
13
D
33
D
33
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