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7 DETAILS OF INSTRUCTIONS
(2) Standard (example of post-increment option)
ld.b
The eight low-order bits of the rs register are transferred to the specified memory location.
The rb register contains the memory address to be accessed. The memory address will be
incremented by two bytes after the data transfer has finished.
(3) Extension 1 (example of post-decrement option)
ext
ld.b
The eight low-order bits of the rs register are transferred to the specified memory location.
The rb register contains the memory address to be accessed. The memory address will be
decremented by imm13 bytes after the data transfer has finished.
(4) Extension 2 (example of pre-decrement option)
ext
ext
ld.b
After the memory address specified by the rb register is decremented by imm24 bytes, the eight
low-order bits of the rs register are transferred to the decremented address.
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
7-94
[%rb]+,%rs
; Destination memory address = rb
; post increment: rb + 1
imm13
[%rb]-,%rs
; Destination memory address = rb
; post decrement: rb - imm13
imm11
; imm11(10:0) = imm24(23:13)
imm13
; = imm24(12:0)
-[%rb],%rs
; Destination memory address = rb - imm24
Seiko Epson Corporation
S1C17 CORE MANUAL
(REV. 1.2)
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