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IP Access Controllers
MC68838
Motorola MC68838 Manuals
Manuals and User Guides for Motorola MC68838. We have
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Motorola MC68838 manual available for free PDF download: User Manual
Motorola MC68838 User Manual (100 pages)
Media Access Controller
Brand:
Motorola
| Category:
IP Access Controllers
| Size: 0.48 MB
Table of Contents
Table of Contents
3
Introduction
11
Overview
12
Chip Features
12
Functional Description
13
Node Processor Interface Logic
13
Receive Data Path
13
Receive Latch
14
Receive CRC Checker
15
Sent Count
15
Counters
15
Receive Finite State Machine
15
Address Comparator
16
Receive Host Interface
16
Transmit Data Path
16
Transmit Data Host Lnterface
17
Send Frame Logic
17
Capture Token Logic
17
Transmit CRC Generator
18
Transmit Finite State Machine
18
Timers
18
Transmit Data Latch (and Repeat Function)
19
Test and Clock Logic
19
Register Description
21
Register Types
23
Read/Write Registers
23
Read/Control Write Registers
23
Read-Only/Clear Registers
23
Read-Only Registers
23
Control and Status Registers
24
Control Register B (MAC_CNTRL_B)
28
Receive Status Register (RX_STATUS)
33
Transmit Status Register (TX_STATUS)
35
Interrupt Registers
37
Interrupt Event Register a (INTR_EVENT_A)
37
Interrupt Event Register B (INTR_EVENT_B)
40
Interrupt Event Register C (INTR_EVENT_C)
43
Interrupt Mask Register a (INTR_MASK_A)
43
Interrupt Mask Register C (INTR_MASK_C)
43
Counter Registers
44
Token Count Register (TOKEN_CT)
45
Station Parameter Registers
45
My Short Address Register (MSA)
45
Frame Count Register (FRAME_CT)
45
My Long Address Register (MLA_A, MLA_B, MLA_C)
46
Target Request Time Register (T_REQ)
46
TVX, TRT Initial Timer Parameter Register (TVX_VALUE, T_MAX)
46
Protocol Timing Registers
47
TVX Timer Register (TVX_TIMER)
47
TRT Timer Register (TRT_TIMER_A, TRT_TIMER_B)
47
THT Timer, Sent Count Registers
49
TRT Time Remaining Register (T_NEG_A, T_NEG_B)
50
Information Field Register (INFO_REG_A)
50
Void Time Counter Register (VOID_TIME)
50
Internal Registers
51
Revision Number Register (REV_NO_REG)
51
Packet Request Register (PKT_REQUEST)
51
Built-In Self-Test Signature Register (BIST_SIGNATURE)
52
Receive CRC Register (RX_CRC)
53
Transmit CRC Registers (TX_CRC)
53
Signal Description
54
Clock Signals
54
Node Processor Interface
55
MAC-PHY Interface
56
Receive System Interface
56
Transmit System Interface
57
CAM Interface
58
Test Signals
59
Bus Operation
60
NPI Operation
60
Read Cycle
60
Write Cycle
62
MAC-PHY Interface Operation
64
Receive Data Path Operation
66
Receive Data Processing
66
Receive Data System Interface
66
Transmit Data Path Control
71
Transmit Data Path Operation
71
MAC Packet Transmission
73
Packet Request Header
74
CAM Interface Operation
77
Normal (Nonextended) Match Mode
77
Extended Match Mode
78
Extensions to a and C Bit Handling
80
Built-In Self-Test Operation
83
Test Operation
83
Scan Path Operation
84
Electrical Characteristics
87
Maximum Ratings
87
Recommended Operating Conditions
87
Thermal Characteristics
87
Node Processor Interface Timing
88
MAC-FSI Timing
90
MAC-ELM Timing
91
CAM Interface Timing
92
Ordering Information
93
Ordering Information and Mechanical Data
93
120-Lead Ceramic Pin Grid Array W/Ceramic Lid (KB)
94
Pin Assignments
94
120-Lead Plastic Quad Gull Wing (FC)
95
Package Dimensions
96
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