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H8/3635
Hitachi H8/3635 Manuals
Manuals and User Guides for Hitachi H8/3635. We have
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Hitachi H8/3635 manual available for free PDF download: Hardware Manual
Hitachi H8/3635 Hardware Manual (403 pages)
H8/3637 Series
Brand:
Hitachi
| Category:
Controller
| Size: 1.48 MB
Table of Contents
Table of Contents
4
Overview
12
Internal Block Diagram
16
Pin Arrangement and Functions
17
Pin Arrangement
17
Pin Functions
19
Cpu
23
Overview
23
Features
23
Address Space
24
Register Configuration
24
Register Descriptions
25
General Registers
25
Control Registers
25
Initial Register Values
27
Data Formats
27
Data Formats in General Registers
28
Memory Data Formats
29
Addressing Modes
30
Effective Address Calculation
32
Instruction Set
36
Data Transfer Instructions
38
Arithmetic Operations
40
Logic Operations
41
Shift Operations
41
Bit Manipulations
43
Branching Instructions
47
System Control Instructions
49
Block Data Transfer Instruction
50
Basic Operational Timing
52
Access to On-Chip Memory (RAM, ROM)
52
Access to On-Chip Peripheral Modules
53
CPU States
54
Overview
54
Program Execution State
56
Program Halt State
56
Exception-Handling State
56
Memory Map
57
Application Notes
58
Notes on Data Access
58
Notes on Bit Manipulation
60
Notes on Use of the EEPMOV Instruction
66
Exception Handling
67
Overview
67
Reset
67
Reset Sequence
67
Interrupt Immediately after Reset
68
Interrupts
69
Overview
69
Interrupt Control Registers
71
External Interrupts
80
Internal Interrupts
80
Interrupt Operations
80
Interrupt Response Time
85
Application Notes
86
Notes on Stack Area Use
86
Notes on Rewriting Port Mode Registers
86
Clock Pulse Generators
89
Overview
89
Block Diagram
89
System Clock and Subclock
89
System Clock Generator
89
Subclock Generator
93
Prescalers
94
Note on Oscillators
94
Power-Down Modes
96
Overview
96
System Control Registers
99
Sleep Mode
102
Transition to Sleep Mode
102
Clearing Sleep Mode
102
Standby Mode
103
Transition to Standby Mode
103
Clearing Standby Mode
103
Oscillator Settling Time after Standby Mode Is Cleared
104
Transition to Standby Mode and Pin States
105
Watch Mode
106
Transition to Watch Mode
106
Clearing Watch Mode
106
Oscillator Settling Time after Watch Mode Is Cleared
106
Subsleep Mode
107
Transition to Subsleep Mode
107
Clearing Subsleep Mode
107
Subactive Mode
108
Transition to Subactive Mode
108
Clearing Subactive Mode
108
Operating Frequency in Subactive Mode
108
Active (Medium-Speed) Mode
109
Transition to Active (Medium-Speed) Mode
109
Clearing Active (Medium-Speed) Mode
109
Operating Frequency in Active (Medium-Speed) Mode
109
Direct Transfer
110
Overview
110
Direct Transfer Time
111
Rom
113
Overview
113
Block Diagram
113
PROM Mode
114
Selection of PROM Mode
114
Socket Adapter Pin Arrangement and Memory Map
114
Programming
117
Programming and Verification
118
Programming Precautions
122
Reliability of Programmed Data
123
Ram
124
Overview
124
Block Diagram
124
I/O Ports
125
Overview
125
Port 1
127
Overview
127
Register Configuration and Description
127
Pin Functions
131
Pin States
133
MOS Input Pull-Up
133
Port 5
134
Overview
134
Register Configuration and Description
134
Pin Functions
139
Overview
142
Port 7
142
Register Configuration and Description
142
Pin Functions
144
Pin States
145
Port 8
146
Overview
146
Pin Functions
148
Pin States
148
Port a
158
Overview
158
Pin Functions
160
Pin States
160
Port B
161
Overview
162
Register Configuration and Description
162
Port E
162
Timers
164
Overview
164
Timer a
165
Overview
165
Register Descriptions
166
Timer Operation
168
Timer a Operation States
169
Timer F
170
Overview
170
Register Descriptions
172
Interface with the CPU
179
Timer Operation
182
Application Notes
184
Timer G
186
Overview
186
Register Descriptions
188
Noise Canceller Circuit
192
Timer Operation
193
Application Notes
197
Sample Timer G Application
201
Timer y
201
Overview
201
Register Descriptions
203
Interface with the CPU
205
Operation
208
Timer y Operating Modes
209
Watchdog Timer
209
Overview
209
Register Descriptions
210
Operation
213
Watchdog Timer Operating Modes
214
Section 10 Serial Communication Interface
215
Overview
215
Sci1
215
Register Descriptions
217
Operation
221
Interrupt Sources
223
Sci3
224
Overview
224
Register Descriptions
226
Operation
243
Operation in Asynchronous Mode
248
Operation in Synchronous Mode
256
Multiprocessor Communication Function
264
Interrupts
270
Application Notes
271
Section 11 DTMF Generator
275
Overview
275
Features
275
Block Diagram
276
Pin Configuration
277
Register Configuration
277
DTMF Control Register (DTCR)
277
DTMF Load Register (DTLR)
277
Operation
281
Output Waveform
281
Typical Use
283
Application Notes
283
Section 12 A/D Converter
284
Overview
284
Features
284
Block Diagram
285
Pin Configuration
286
Register Configuration
286
Register Descriptions
287
A/D Result Register (ADRR)
287
A/D Mode Register (AMR)
287
A/D Start Register (ADSR)
289
Operation
290
A/D Conversion Operation
290
Start of A/D Conversion by External Trigger Input
290
Interrupts
290
Typical Use
291
Application Notes
294
Section 13 14-Bit Pulse Width Modulator (PWM)
295
Overview
295
Features
295
Block Diagram
295
Pin Configuration
296
Register Configuration
296
Register Descriptions
296
PWM Control Register (PWCR)
296
PWM Data Registers U and L (PWDRU, PWDRL)
297
Operation
298
Section 14 Electrical Characteristics
299
Absolute Maximum Ratings
299
Electrical Characteristics
300
Power Supply Voltage and Operating Range
300
DC Characteristics
302
AC Characteristics
307
A/D Converter Characteristics
310
DTMF Characteristics
311
Operation Timing
312
Output Load Circuits
315
Appendix A CPU Instruction Set
316
Instructions
316
Operation Code Map
323
Number of Execution States
326
Appendix B On-Chip Registers
333
I/O Registers (1)
333
I/O Registers (2)
337
Appendix C I/O Port Block Diagrams
376
Port 1 Block Diagrams
376
Port 2 Block Diagrams
383
Port 5 Block Diagram
391
Port 6 Block Diagram
392
Port 7 Block Diagram
393
Port 8 Block Diagram
394
Port 9 Block Diagram
395
Port a Block Diagram
396
Port B Block Diagram
396
Port E Block Diagram
397
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