No. 0208 15LD2200 SERVICE MANUAL MANUEL D'ENTRETIEN WARTUNGSHANDBUCH CAUTION: Before servicing this chassis, it is important that the service technician read the “Safety Precautions” and “Product Safety Notices” in this service manual. Data contained within this Service manual is subject to alteration for improvement.
TABLE OF CONTENTS INTRODUCTION ...........................3 1.1. Scope ..............................3 1.2. General Features ..........................3 SYSTEM BUILDING BLOCKS ......................4 2.1. Analog Front End ..........................4 2.1.1. Tuner............................4 2.1.2. SAW Filters ..........................5 2.2. Back End............................5 2.3. Side Board(s) .............................7 2.3.1. Keypads ............................7 2.3.2. IR&Led Board ..........................7 2.4.
Page 4
4.2.4. Init NVM ............................39 4.2.5. Initial APS ..........................39 4.2.6. Hotel Mode Activate........................39 4.2.7. Burn In Mode ..........................39 4.2.8. Country .............................39 4.2.9. Language ..........................39 4.2.10. Pannel Type ..........................39 4.2.11. Menu Background .........................40 4.2.12. Remote Control ........................40 4.2.13. PC Mode ..........................40 PRODUCTION SETTINGS AND FACTORY DEFAULTS..............41 5.1.
INTRODUCTION 1.1. Scope The document covers 15” (17MB18) chassis building blocks, basic features, service menu settings, and the other information needed by service personal. 1.2. General Features The system is a TFT LCD TV solution with UOCIII Versatile Signal Processor and PW1306 Video Image Processor chip-set on 4-layer PCB.
SYSTEM BUILDING BLOCKS 17MB18 chassis main blocks are as follows: • Analog Front End : UOCIII (Microcontroller + Video Proccessor + Sound Proccessor + IF), CTI, Tuner, SAW filters, Audio Amp., DAC • Back End : PW1306 (Microcontroller, Scaler, OSD, Keyboard/IR Interface) •...
I.F out 1 Asymmetrical I.F Output / Symmetrical I.F output 1 M1,M2,M3, Mounting Tags (Ground) 2.1.2. SAW Filters K3953M is an IF Filter for Video Applications. The package is SIP5K. Supported standards are B/G, D/K, I, L/L’. K9656M is an IF Filter for Audio Applications. The package is SIP5K. Supported standards are B/G, D/K, I, L/L’. 2.2.
Page 8
RF in UOCIII VFIN (24,25) S-Video in Y4(51) C4(52) CVBS in CVBS3/Y3(58) AUDIOIN5L(34) AUDIOIN5R(35) C2(59) Scart CVBS2/Y2(55) IFVO(43) AUDIOUTSL(36) AUDIOUTSR(37) AUDIOIN3L(56) AUDIOIN3R(57) TV_HS Audio in TV_VS 74HC14 VDRA,HOUT(23,67) HP DRIVER FBLIN AUDOUTHP[L,R](62,63) TDA1308 [R,G,B]IN FBLIN R,G,B(78,79,80) AUDIO CTI/ AMPLIFIER [Y,U,V]OUT(74,75,76) SANDC 2xTDA7056 AUDOUTLS[L,R](60,61)
2.3. Side Board(s) 2.3.1. Keypads The keypad for 17MB18 main board is in the Table below. (The all other keypads for different cabinets have the same connector pinning though): 15” Key Name Type Function 17TK26 Power Soft sw. Power shut-down and turn on Stand-by Tact sw.
IC AND COMPONENT DESCRIPTIONS 3.1. Basic IC List Title Description IC203 UOCIII Versatile Signal Processor IC100 PW1306 Video Image Processor with Analog Interface IC102 MT28F800B3W Flash Memory IC176 DS90C385 Programmable LVDS Transmitter IC103 EL1883 Sync Separator IC405, IC402 P15V330 Wide Bandwidth 2-channel Multiplexer/Demultiplexer IC404 74HC4052 Dual 4-channel Analog Multiplexer...
3.2.1. Pinout Figure 6: UOCIII Pin configuration “stereo” and “AV-stereo” versions with Audio DSP AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO VSSP2 ground VSSC4 ground VDDC4 digital supply to SDACs (1.8V) VDDA3(3.3V) supply (3.3 V) VREF_POS_LSL positive reference voltage SDAC (3.3 V) VREF_NEG_LSL+HPL negative reference voltage SDAC (0 V) VREF_POS_LSR+HPR...
Page 14
AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO XTALIN crystal oscillator input XTALOUT crystal oscillator output VSSA1 ground VGUARD/SWIO V-guard input / I/O switch (e.g. 4 mA current sinking capability for direct drive of LEDs) DECDIG decoupling digital supply supply voltage TV-processor (+5 V) PH2LF phase-2 filter...
Page 15
AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO DVBO/FMRO Digital Video Broadcast output / FM radio output VCC8V 8 Volt supply for audio switches AGC2SIF AGC capacitor second sound IF supply voltage TV processor (+5 V) IFVO/SVO/CVBSI IF video output / selected CVBS output / CVBS input AUDIOIN4 audio 4 input...
Page 16
AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO VOUT (SWO1) V-output for YUV interface (general purpose switch output) RGB / YP insertion input INSSW3 R input / P input G input / Y input G/YIN3 B input / P input GND3 ground 3 for TV-processor...
AV STEREO STEREO +AV SYMBOL NO AUDIO MONO DESCRIPTION STEREO P1.3/T1 port 1.3 or Counter/Timer 1 input port 1.6 or I C-bus clock line P1.6/SCL port 1.7 or I C-bus data line P1.7/SDA supply to periphery and on-chip voltage regulator VDDP(3.3V) (3.3 V) P2.0/TPWM...
Page 18
• OS (output with fixed slew-rate control) • AI (analog input, 5-volt tolerant) • DI (digital input, 5-volt tolerant) • DIS (digital input, 5-volt tolerant, Schmitt trigger) • I (XTALIN) • (XTALOUT) • P (power) • NC (no connect) • BOD (bidirectional open drain) •...
Page 19
Signal Type Function External PLL Loop Filter. When using the on-chip PLL, this pin must be connected to FILT an external filter network. Horizontal Synchronization Input. This digital input signal controls the horizontal scan HSYNC frequency by synchronizing the start of the horizontal scan. The logic polarity of this signal is controlled by the HSPOL bit.
Page 20
Signal Type Function DEG1 DEG2 DEG3 DEG4 DEG5 DEG6 DEG7 DEB0 DEB1 DEB2 DEB3 DEPort Blue Pixel Data. In dual pixel output mode these pins are the EVEN blue outputs. DEB4 DEB5 DEB6 DEB7 DVPort Pixel Clock. The VCLK pin is used for DV port image capture. The polarity VCLK I/O D5 can be selected by the VCLKPOL bit.
Page 21
Signal Type Function DOR0 DOR1 DOR2 DOR3 DOPort Red Pixel Data. In dual pixel output mode these pins are the ODD red outputs. In single pixel output mode these pins are not used. DOR4 DOR5 DOR6 DOR7 DOG0 DOG1 DOG2 DOG3 DOPort Green Pixel Data.
Page 22
Signal Type Function DOB4 DOB5 DOB6 DOB7 I/O D5 Write Enable. Low indicates a write to external RAM or other devices. I/O D5 Read Enable. Low indicates a read to external RAM or other devices. ROMOE ROM Output Enable. Low output indicates a read from external ROM. ROMWE ROM Write Enable.
Page 23
Signal Type Function Microprocessor 16-bit bidirectional data bus. General-purpose I/O port bit controlled by PADAT0 and PAEN0. This pin has one other possible function when EXTRAMEN=1. When EXTRAMEN=1 and PAEN0=0, PORTA1 is microprocessor address bit 0 (A0). PORTA0 General-purpose I/O port bit controlled by PADAT1 and PAEN1. This pin has one other possible function when EXTRAMEN=1.
Page 24
Signal Type Function General-purpose I/O port bit controlled by PADAT3 and PAEN3. This pin can also PORTA3 function as an external clock source for DCLK (DCLKEXT) when both the internal PLLs are disabled or when DPLLBYP=1. General-purpose I/O port bit controlled by PADAT4 and PAEN4. This pin has one other possible function when IREN=1.
Page 25
Signal Type Function 136, Digital core ground. 147, 174, 104, VDDQ3 122, 3.3V digital I/O power. 133, 171, 105, VSSQ 123, Digital I/O ground. 134, 172, VDDPA1 1.8V analog clock generator power. VDDPA2 1.8V analog clock generator power. VSSPA1 Clock generator analog ground. VSSPA2 Clock generator analog ground.
Signal Type Function 3.4. M29W800AT Low Voltage Single Supply Flash Memory to store PW1306 code. ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code, M29W800AT: D7h 3.5. DS90C385 The DS90C385 transmitter converts 28 bits of LVCMOS/ LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams.
• SRT (LTI) • Y Group Delay Correction (Shoot balance) • Color Detail Enhancer (CDE) and Noise Detection • Cb/Cr block • Color SRT (CTI) • Green Stretcher 3.9. TDA7056A The TDA7056A is a mono BTL output amplifier with DC volume control. It is designed for use in TV and monitors. •...
3.11. LM1117 The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. The output voltage is adjusted according to the formula shown in Figure 9. • Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions •...
3.14. 74LVC541 The 74LVC541A is an octal non-inverting buffer/line driver with 5V tolerant inputs/outputs. The 3-state outputs are controlled by the output enable inputs OE1and OE2. • 5 V tolerant inputs/outputs; for interfacing with 5V logic • Wide supply voltage range from 2.7 to 3.6V •...
Note: (I): Input, (IPU): input with p-channel pull-up transistor, (ODN): output with open drain n-channel transistor (OD3): output 3-state 3.16. MC34167 The MC34167, MC33167 series are high performance fixed frequency power switching regulators that contain the primary functions required for dc–to–dc converters. This series was specifically designed to be incorporated in step–down and voltage– inverting configurations with a minimum number of external components and can also be used cost effectively in step–up applications.
Symbol Description TXOUT0- LVDS Signal(-) LVDS_GND Ground LVDS_GND Ground Power Supply (+5 or +3.3V) Power Supply (+5 or +3.3V) 3.18.5. TTL Panel Connector -Even (2x17 PL177) Symbol Description Symbol Description DBE6 Blue DGE2 Green DBE7 Blue Ground DBE4 Blue DGE0 Green DBE5 Blue...
3.18.14. Side AV Connector for Side-card Option (PL406) Signal Signal Ground Right Audio in Left Audio in Ground Ground CVBS in 3.18.15. Side SVHS Connector for Side-card Option (PL407) Signal Y-Luma Ground C-Chroma 15” TFT TV Service Manual...
4. SERVICE MENU SETTINGS 4.1. UOCIII Service Menu • Turn on the TV. Press “Menu” (M) and “4” ”7” “2” “5” buttons of RC respectively. The following menu will • displayed on the screen GTV 3.2.1 EurAsia TVSub 00XXX 00000000 00111100 01000000 01100100 11000101 01100100 00000000 01100100...
Page 36
Group: Name: Function: Default: “Y delay” setting. (SCART) (0-15) YAV1 Video “Y delay” setting. (FAV) (0-15) YAV2 Video “Y delay” setting. (0-15) YSVHS1 Video “Y delay” setting. (S-Video) (0-15) YSVHS2 Video Bit Control Bit Control Bit Control Bit Control Bit Control Bit Control PeakFreqPAL443 Video...
Page 37
Group: Name: Function: Default: BGSCAL DEC Audio BGSCAL MONO Audio BGSCAL NIC Audio BGSCAL SAP Audio MSCAL DEC Audio MSCAL MONO Audio MSCAL NIC Audio MSCAL SAP Audio LSCAL DEC Audio LSCAL MONO Audio LSCAL NIC Audio LSCAL SAP Audio Audio Audio CMUTE...
Group: Name: Function: Default: LCD-CON-AV1S Sub System LCD-CON-AV2 Sub System AV CVBS contrast adjust. LCD-CON-AV2S Sub System S-Video input contrast adjust. Sub System Sub System Sub System Sub System UOC Red Contrast PGG-CVBS Sub System UOC Green Contrast for CVBS input PGG-RGB Sub System UOC Green Contrast for RGB input...
Service Menu Service Submenu1 Service Submenu2 Factory Settings Dclock Polarity Falling Init NVM Country UOC Hposition Initial APS Language Panel Type SAMSUNG 15_XGA ADC_Calibration Hotel Mode Activate Menu Background Opaque UOC_Calibration Burn-In Mode Remote Control PC Mode This value indicates the horizontal positioning of the picture. In this row “Software version and date is mentioned”...
Init NVM 4.2.4. • Press RC “RIGHT” button at “Service Submenu 1” and switch to “Service Submenu 2” • Press RC “DOWN” button and highlight “Init NVM” • Press RC “RIGHT” button to set TV to initial settings. Next time TV is turned on, default settings will be loaded to TV.
• Press RC “DOWN” button and highlight ”Pannel Type” • Press RC “RIGHT” and “LEFT” buttons to set the panel type. Menu Background 4.2.11. • Press RC “RIGHT” button at “Service Submenu 1” and switch to “Service Submenu 2” • Press RC “RIGHT” button at “Service Submenu 2” and switch to “Factory Settings” •...
5. PRODUCTION SETTINGS AND FACTORY DEFAULTS 5.1. Production Schedule • UOCIII Programming before test Jig Settings that will be performed on the Test Jig. • Tuner AGC Alignement (Section 4.1.2). • DCXO Alignement (Section 4.1.3) • UOC Calibration (Section 4.2.2) •...
Audio Menu 5.3.2. Audio volume balance extended audio features Feature headphone equalizer effect normal volume sound style user balance Will be left unchanged as they are adjusted in the EEPROM. Window Menu 5.3.3. Window image size auto white tone normal dynamic skin tone Options Menu 5.3.4.
5.4. PC Mode Menu Picture Menu 5.4.1. Picture brightness contrast filter Sharp phase frequency Brightness and contrast values will be left unchanged after the UOC Calibration Phase value is automatically set by the software. There is no need to adjust any value in this section.
6. BLOCK DIAGRAM Line TDA7056A TDA1308 TTL(48) S-video in PW1306 DRGB(24) Audio In L/R Audio Scart DEN, DCLK, DVS, DHS RGB, YUV out YUV_TV_SW VGA_TV_ SW YUV in Side FBLIN TA1366 LTI/CTI Optional YCbCr input from scart Optional YCbCr input V330 V330 PC in...