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Mitsubishi Electric MELSEC-Q Series Programming Manual
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Mitsubishi Electric MELSEC-Q Series Programming Manual

Mitsubishi Electric MELSEC-Q Series Programming Manual

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MELSEC-Q/L
Programming Manual (MELSAP-L)

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Summary of Contents for Mitsubishi Electric MELSEC-Q Series

  • Page 1 MELSEC-Q/L Programming Manual (MELSAP-L)

  • Page 3: Safety Precautions

    Mitsubishi representative in your region. INTRODUCTION Thank you for purchasing the Mitsubishi Electric MELSEC-Q/L series programmable controllers. Before using the product, please read this manual carefully and develop familiarity with the functions and performance of the MELSEC-Q/L series programmable controllers to handle the product correctly.

  • Page 4: Table Of Contents

    CONTENTS SAFETY PRECAUTIONS ..............1 CONDITIONS OF USE FOR THE PRODUCT .
  • Page 5 Active step batch readout (MOV and DMOV) ........... 84 Active step batch readout (BMOV) .
  • Page 6 Step START (Activate) and END (Deactivate) Methods ........164 Step START (activate) methods .

  • Page 7: Relevant Manuals

    Print book [SH-080809ENG] application instructions. e-Manual e-Manual refers to the Mitsubishi Electric FA electronic book manuals that can be browsed using a dedicated tool. e-Manual has the following features: • Required information can be cross-searched in multiple manuals. • Other manuals can be accessed from the links in the manual.

  • Page 8: Terms

    TERMS Unless otherwise specified, this manual uses the following generic terms and abbreviations. Generic term Description Basic A generic term for the Q00JCPU, Q00CPU, and Q01CPU Basic model QCPU High Performance A generic term for the Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, and Q25HCPU High Performance model QCPU High-speed Universal model A generic term for the Q03UDVCPU, Q04UDVCPU, Q06UDVCPU, Q13UDVCPU, and Q26UDVCPU...

  • Page 9: Chapter 1 General Description

    GENERAL DESCRIPTION SFC, an abbreviation for "Sequential Function Chart", is a control specification description format in which a sequence of control operations is split into a series of steps to enable a clear expression of the program execution sequence and execution conditions.
  • Page 10 When created with MELSAP-L and ladders MELSAP-L side Sequence programs side The flow of operation is easy to understand by creating the SFC program The area can be developed into a product by creating interlock conditions related to the interlock conditions. irrelevant to the flow of operation.

  • Page 11: Description Of Sfc Program

    Description of SFC Program The SFC program consists of steps that represent units of operations in a series of machine operations. In each step, the actual detailed control is programmed by using a ladder circuit. Grouping steps into one block in process units allows to create an SFC program that is capable of tracking all the processes as well as structuring the operation flow in each process.

  • Page 12: Sfc (Melsap-L) Features

    SFC (MELSAP-L) Features This section describes the SFC (MELSAP-L) features. Easy to design and maintain systems It is possible to correspond the controls of the entire facility, mechanical devices of each station, and all machines to the blocks and steps of the SFC program on a one-to-one basis. Because of this capability, systems can be designed and maintained with ease even by those with relatively little knowledge of sequence programs.
  • Page 13 Program development efficiency is enhanced by dividing control into parts The machine control process can be divided into parts by describing the operation sequence and machine control separately. The MELSAP-L is used to describe the operation sequence for the machine, and a sequence program (circuit/list) is used to describe the machine control including individual interlock.
  • Page 14 Block and step configurations can easily be changed for new control applications • A total of 320 blocks can be created in an SFC program. • Up to 512 steps can be created per block. • Up to 2K sequence steps of operation outputs/transition conditions can be created in all blocks. Reduced tact times, as well as easier debugging and trial run operations are possible by dividing blocks and steps as follows: •...
  • Page 15 Creation of multiple initial steps is possible Multiple processes can easily be executed and combined. Initial steps are linked using a "selection coupling" format. When multiple initial steps (S0 to S3) are active, the step where the transition condition (t4 to t7) immediately prior to the selected coupling is satisfied becomes inactive, and a transition to the next step occurs.
  • Page 16 Program design is easy due to a wealth of step attributes A variety of step attributes can be assigned to each step. Used singly for a given control operation, or in combination, these attributes greatly simplify program design procedures. ■Types of HOLD steps, and their operations •...
  • Page 17 ■Reset step When a HOLD status becomes unnecessary for machine control, or on selective branching to a manual ladder occurs after an error detection, etc., a reset request can be designated for the HOLD step, deactivating the step in question. ■Types of block START steps, and their operations •...
  • Page 18 A given function can be controlled in a variety of ways according to the application Block functions such as START, END, temporary stop, restart, and forced activation and ending of specified steps can be controlled by SFC diagram symbols, SFC control instructions, or by SFC information registers. Control method Description Control by SFC diagram symbols...

  • Page 19: Chapter 2 System Configuration

    SYSTEM CONFIGURATION This chapter describes the system configuration of the SFC program. Applicable CPU Modules MELSAP-L (SFC programs) runs on the following CPU modules. CPU module type Model name Basic model QCPU Q00JCPU, Q00CPU, Q01CPU High Performance model QCPU Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU Process CPU Q02PHCPU, Q06PHCPU, Q12PHCPU, Q25PHCPU Redundant CPU...

  • Page 20: Peripheral Devices For Sfc Programs

    Peripheral Devices for SFC Programs The following peripheral devices can be used to create, edit and monitor SFC programs. The numbers in the following table mean (1): Basic model QCPU, (2): High Performance model QCPU, (3): Process CPU, (4): Redundant CPU, (5): Universal model QCPU, and (6): LCPU.

  • Page 21: Chapter 3 Specifications

    SPECIFICATIONS This chapter describes the specifications of SFC programs. Performance Specifications Related to SFC Programs This section describes the performance specifications of SFC programs. Basic model QCPU ■Performance specifications Item Q00JCPU Q00CPU Q01CPU SFC program Capacity Max. 8k steps Max. 8k steps Max.
  • Page 22 QCPU (except Basic model QCPU), LCPU ■Performance specifications Item Q02CPU, Q06HCPU, Q12HCPU, Q25HCPU, Q02HCPU, Q06PHCPU Q12PHCPU, Q25PHCPU, Q02PHCPU Q12PRHCPU Q25PRHCPU Capacity Max. 28k steps Max. 60k steps Max. 124k steps Max. 252k steps program Number of files Scannable SFC program: 2 (1 normal SFC program and 1 program execution management SFC program) Number of blocks Max.
  • Page 23 Item Q20UDHCPU, Q26UDHCPU, Q50UDEHCPU Q100UDEHCPU Q20UDEHCPU Q26UDVCPU, Q26UDEHCPU Capacity Max. 200k steps Max. 260k steps Max. 500k steps Max. 1000k steps program Number of files Scannable SFC program: 1 (normal SFC program only) Number of blocks Max. 320 blocks (0 to 319) *3*4 Number of SFC steps Max.
  • Page 24 ■Precautions for creating SFC program • The SFC programs that can be created are "scan execution type program" and "stand-by type program". • Two SFC programs (one normal SFC program and one program execution management SFC program) can be set as a scan execution type program.

  • Page 25: Device List

    Device List This section describes the transition conditions of SFC programs and devices used for operation output. Basic model QCPU Classification Type Device name Default Parameter setting range Point Range Internal user Bit device Input 2048 points X0 to X7FF Hexadecimal Can be changed within device...
  • Page 26 *1 For the timer, retentive timer, and counter, contact/coil values are stored in bit devices, and current values are stored in word devices. *2 The number of points that can be actually used varies depending on the intelligent function module. For the points in the buffer memory, refer to the manual for the intelligent function module used.
  • Page 27 Device list of High Performance model QCPU, Process CPU, and Redundant CPU Classification Type Device name Default Parameter setting range Point Range Internal user Bit device Input 8192 points X0 to X1FFF Hexadecimal Can be changed within device 29k words. Output 8192 points Y0 to Y1FFF...
  • Page 28 *1 For the timer, retentive timer, and counter, contact/coil values are stored in bit devices, and current values are stored in word devices. *2 The number of points that can be actually used varies depending on the intelligent function module. For the points in the buffer memory, refer to the manual for the intelligent function module used.
  • Page 29 Device list of Universal model QCPU Classification Type Device name Default Parameter setting range Point Range Internal user Bit device Input 8192 points X0 to X1FFF Hexadecimal Can be changed within *3*19 device 29k words. Output 8192 points Y0 to Y1FFF Hexadecimal Internal relay 8192 points...
  • Page 30 Classification Type Device name Default Parameter setting range Point Range  Constant Decimal constant K-2147483648 to K2147483647 Hexadecimal constant H0 to HFFFFFFFF Real constant • Single-precision floating-point data: E1.17549435-38 to E3.40282347+38 • Double-precision floating-point data : E2.2250738585072014-308 to E1.7976931348623157+308 Character string constant Up to 32 characters (ex.
  • Page 31 Device list of LCPU Classification Type Device name Default Parameter setting range Point Range Internal user Bit device Input 8192 points X0 to X1FFF Hexadecimal Setting available (Up device to 29K words for the Output 8192 points Y0 to Y1FFF Hexadecimal internal user device) Internal relay...

  • Page 32: Processing Time

    Processing Time This section describes the processing time for SFC programs. Processing time for SFC program Calculate the SFC program processing time with the following expression • Processing time for SFC program = (A) + (B) + (C) Item Description Processing time of operation Total sum of the processing times of the instructions used for the operation outputs of all steps that are active outputs in all steps...
  • Page 33 ■System processing times for different CPU module models This section describes the system processing time for each CPU module. • When Basic model QCPU is used Item Q00JCPU Q00CPU Q01CPU Active block processing time coefficient 41.9s 35.5s 27.3s Inactive block processing time coefficient 10.5s 8.8s 6.8s...
  • Page 34 • LCPU Item L02SCPU, L02CPU, L06CPU, L06CPU-P, L26CPU, L26CPU-P, L02SCPU-P L02CPU-P L26CPU-BT, L26CPU-PBT Active block processing time coefficient 12.7s 8.5s 7.0s Inactive block processing time coefficient 5.3s 3.8s 3.4s Nonexistent block processing time coefficient 0.9s 1.2s 0.6s Active step processing time coefficient 11.9s 8.7s 6.4s...
  • Page 35 [SFC system processing time calculation example] Using the Q25HCPU as an example, the processing time for the SFC system is calculated as shown below, given the following conditions. • Designated at initial START • Number of active blocks: 30 (active blocks at SFC program) •...

  • Page 36: Processing Time For S(P).Sfcscomr Instruction And S(P).Sfctcomr Instruction

    Processing time for S(P).SFCSCOMR instruction and S(P).SFCTCOMR instruction Processing time for S(P).SFCSCOMR instruction and S(P).SFCTCOMR instruction is shown below. [Condition] • The number of comments to be stored in the comment file: 1000 • Sequence steps in the SFC step in the SFC program: 1000 sequence steps •...
  • Page 37 Instruction Condition Universal model QCPU Q03UDVCPU Q04UDVCPU, Q06UDVCPU, Q13UDVCPU, Q26UDVCPU Min. Max. Min. Max. S(P).SFCSCOMR At instruction execution 54.6s 65.0s 51.3s 65.0s S(P).SFCTCOMR 54.8s 65.3s 51.7s 65.3s Instruction Condition Universal model QCPU Q03UDVCPU Q04UDVCPU, Q06UDVCPU, Q13UDVCPU, Q26UDVCPU Standard RAM Standard RAM S(P).SFCSCOMR At END processing (read 1 comment) 0.26ms...

  • Page 38: Calculating The Sfc Program Capacity

    Calculating the SFC Program Capacity In order to express the SFC diagram using instructions, the memory capacity shown below is required. The method for calculating the SFC program capacity and the number of steps when the SFC diagram is expressed by SFC dedicated instructions is described in this section.

  • Page 39: Number Of Steps Required For Expressing The Sfc Diagram As Sfc Dedicated Instructions

    Number of steps required for expressing the SFC diagram as SFC dedicated instructions The following table shows the number of steps required for expressing the SFC diagram as SFC dedicated instructions. Name Ladder Number of Description Required Number of Steps Expression Steps SFCP START instruction...

  • Page 40: Chapter 4 Sfc Program Configuration

    SFC PROGRAM CONFIGURATION This chapter describes the SFC program symbols, SFC control instructions and SFC information devices that comprise an SFC program. When applying the program examples introduced in this manual to an actual system, ensure the applicability and confirm that it will not cause system control problems.

  • Page 41: List Of Sfc Diagram Symbols

    List of SFC Diagram Symbols The symbols used in the SFC program are listed below. Class Name SFC Diagram Symbol Remarks Step Initial step When step No. is "0" Any of these steps in 1 block Initial step at top left (column 1) of SFC diagram is fixed to No.
  • Page 42 Class Name SFC Diagram Symbol Remarks Transition Serial transition a, b = Transition condition No. Selection branching Selection coupling Selection coupling - parallel branching Parallel branching Parallel coupling Parallel coupling - parallel branching Parallel coupling - selection branching Selection branching - parallel branching Parallel coupling - selection coupling Selection branching - parallel branching Parallel coupling - selection coupling...
  • Page 43 Class Name SFC Diagram Symbol Remarks Transition End step transition a, b = Transition condition No. j = jump destination step No. Selection coupling - Jump Selection coupling - Selection branching -Jump Selection coupling - Selection coupling - Jump Selection branching - Jump Selection coupling - Jump 4 SFC PROGRAM CONFIGURATION 4.1 List of SFC Diagram Symbols...

  • Page 44: Steps

    Steps Steps are the basic units for comprising a block, and each step consists of operation outputs. • The following table indicates the number of steps that can be used in one block. CPU module type Maximum number of steps in Maximum number of steps one block for all blocks...
  • Page 45 ■When the SET, basic or application instruction is used If a transition to the next step occurs and the corresponding step becomes inactive, the device remains ON or the data stored in the device is held. To turn OFF the ON device or clear the data stored in the device, use the RST instruction, etc. at another step.
  • Page 46 • When a transition to the next step occurs before the reset instruction of the counter is executed, the present value of the counter and the ON/OFF status of the contact are held if the corresponding step becomes inactive. To reset the counter, use the RST instruction, etc.

  • Page 47: Initial Step

    Initial step The initial step represents the beginning of a block. Up to 32 initial steps per block can be designated. When there are more than one initial step, the coupling enabled is only a selective coupling. Execute the initial steps in the same way as executing the steps other than the initial step.

  • Page 48: Dummy Step

    Operation of the initial steps with step attributes The operation of the initial steps with step attributes is the same as that of the other steps. Refer to Page 46 Coil HOLD step to Page 51 Reset step. Dummy step A dummy step is a waiting step, etc., which contains no operation output program.
  • Page 49 Block STOP processing Make a block STOP using the STOP/RESTART bit of the SFC information devices or the block STOP instruction of the SFC control instructions. The processing of the active step in the block where a block STOP was made is as described below. ■When the "block STOP-time operation output flag (SM325)"...

  • Page 50: Operation Hold Step (Without Transition Check)

    Operation HOLD step (without transition check) An operation HOLD step (without transition check) is a step where the operation output processing of the corresponding step continues after a transition to the next step. However, transition processing to the next step is not executed if the transition condition is satisfied again at the corresponding step.

  • Page 51: Operation Hold Step (With Transition Check)

    Operation HOLD step (with transition check) An operation HOLD step (with transition check) is a step where the operation output processing of the corresponding step continues after a transition to the next step. When the transition condition is satisfied again at the corresponding step, transition processing to the next step (reactivation) is executed.
  • Page 52 Block STOP processing Make a block STOP using the STOP/RESTART bit of the SFC information devices or the block STOP instruction of the SFC control instructions. The processing of the active step in the block where a block STOP was made is as described below. ■When the "block STOP-time operation output flag (SM325)"...

  • Page 53: Reset Step

    Reset step A reset step is a step which designates a forced deactivation of another specified step (operation output). The reset step deactivates the designated step in the current block before execution of the operation output every scan. Except the deactivation of the specified step, the reset step execute the operation output with the same functions as a normal step (without step attributes).

  • Page 54: Block Start Step (With End Check)

    Block START step (with END check) A block START step (with END check) is the step where the specified block is started, and when the START destination block is then deactivated, the check of the transition condition to the next step is started. The operation of the block START step (with END check) is described below.

  • Page 55: Block Start Step (Without End Check)

    Number of concurrently active steps The following table indicates the number of steps that can be executed simultaneously in all blocks and the maximum number of active steps in a single block. CPU module type Number of steps that can be Maximum number of active executed simultaneously in steps in one block...
  • Page 56 Start for a single block A simultaneous start cannot be made for a single block. The block that has already started cannot be started, either. If either of the above starts is made, the following processing is performed depending on the setting of the operation mode at block double START.

  • Page 57: End Step

    End step An end step indicates that a series of processings in the corresponding block is all ended. Operation of end step When the end step is reached, the following processing is performed to end the block. • All steps in the block are deactivated. (The held step are also deactivated.) •...
  • Page 58 Precautions to be taken when SM328 is turned ON The following gives the precautions to be taken when SM328 is turned ON • When there is only the held step left at arrival at the end step, that held step is deactivated if SM328 is ON. When the user does not want to turn OFF the coil output of the held step suddenly, it can be prevented by turning ON SM327.

  • Page 59: Instructions That Cannot Be Used With Operation Outputs

    Instructions that cannot be used with operation outputs The following table lists instructions that cannot be used with operation outputs. Class Instruction Code Symbol Function Master control MC N No.1_D Master control set MCR N Master control reset FEND FEND Main routine program end Sequence program end Program branch...

  • Page 60: Transition

    Transition A transition is the basic unit for comprising a block, and is used by specifying a transition condition. A transition condition is a condition for execution to proceed to the next step, and execution proceeds to the next step when the condition is satisfied. Type Function Outline Serial transition...
  • Page 61 The following flow chart describes the operating status of the serial transition. 4 SFC PROGRAM CONFIGURATION 4.3 Transition...

  • Page 62: Selection Transition

    Selection transition A "selection transition" is the transition format in which several steps are coupled in a parallel manner, with processing occurring only at the step where the transition condition is satisfied first. Item SFC diagram Description Branch • From step "n", processing will proceed to either step "n+1" or step "n+2", depending on which transition condition ("b"...
  • Page 63 In a selection transition, a coupling can be omitted by a jump transition or end transition. When transition condition "b" is satisfied at the step "n" operation output, processing will proceed in order through steps "n+1", "n+2" and "n+3". When transition condition "d" is satisfied, processing will jump to step "n".
  • Page 64 The following flow chart describes the operating status of the selective sequence. 4 SFC PROGRAM CONFIGURATION 4.3 Transition...

  • Page 65: Parallel Transition

    Parallel transition "Parallel transition" is the transition format in which several steps linked in parallel are processed simultaneously when the relevant transition condition is satisfied. Item SFC diagram Description Branch • From step "n", processing will proceed simultaneously to steps "n+1"...
  • Page 66 If another block is started by the parallel processing operation, the START source block and START destination block will be executed simultaneously. (In the example below, processing from step "n+1" will be executed simultaneously with block 1.) When condition "b" is satisfied at step "n" execution, processing will proceed to step "n+1" and block 1 will be started.
  • Page 67 Couplings must be provided when the parallel transition format is used. Program creation is impossible without couplings. Program without couplings (Cannot be designated) As a rule, a waiting step must be created prior to the coupling. However, in cases such as the example below where each of the parallel transition columns consist of only 1 step (program without a transition condition between the parallel transition branch and the coupling), a waiting step is not required.
  • Page 68 The following flow chart describes the operating status of the parallel transition. 4 SFC PROGRAM CONFIGURATION 4.3 Transition...

  • Page 69: Jump Transition

    Jump transition A "jump transition" is a jump to a specified step within the same block which occurs when the transition condition is satisfied. SFC diagram Description When condition "b" is satisfied at step "n" execution, step "n" (operation output [A]) is deactivated, and processing proceeds to step "m".

  • Page 70: Precautions For Creating Operation Output (Step)/Transition Condition Programs

    Precautions for creating operation output (step)/transition condition programs This section describes the precautions for creating operation output (step) and transition condition programs. Step program ■Step program expression method Since a step program cannot use contacts and instructions equivalent to contacts, the operation output of an active step is executed when the transition condition is satisfied.
  • Page 71 Precautions on description ■Description of the instructions which do not require execution conditions (e.g. DI or EI) Describe the instructions which do not require execution conditions (e.g. DI or EI) at the last of each operation output. With the MELSAP-L, execution conditions like contacts cannot be created as the operation output. Therefore, the instruction which requires execution conditions cannot be created after the instruction which exists individually and does not require execution conditions.
  • Page 72 ■Instructions used Instructions which can be used in a transition condition program are listed below. : Usable, : Unusable Class Instruction Instruction expression Function CPU Module Type Code Basic model High Universal QCPU Performance model QCPU, model QCPU, LCPU Process CPU ...
  • Page 73 Serial and parallel connections being mixed When serial and parallel connections exist in the same transition condition, a serial connection "&" has priority. Use "( )" to give a parallel connection " | " higher priority. Example of serial and parallel connections being mixed Example of serial and parallel connections being mixed Ladder example aX0 | aM0 &...

  • Page 74: Controlling Sfc Programs By Instructions (Sfc Control Instructions)

    Controlling SFC Programs by Instructions (SFC Control Instructions) SFC control instructions can be used to check a block or step operation status (active/inactive), or to execute a forced START or END, etc. Using the SFC control instructions with an SFC program created with SFC program symbols, the SFC program can be usually controlled easily.
  • Page 75 Name Instruction Expression Function CPU Module Type Basic High Universal model Performance model QCPU Model QCPU, QCPU, Process CPU, LCPU Redundant    Step END A specified step in a specified block instruction is forcibly ended (deactivated). rBLm\Sn  ...
  • Page 76 How to read tables for the instructions The following table is used in the explanations of the various instructions. The table contents are explained below.  Ladder symbols are indicated in this area. Destination: Data destination following the operation. Source: Where data is stored prior to the operation. ...
  • Page 77 • When a device name is indicated in the "constant", "expansion SFC", or the "other" column, only that device may be used. If "K, H" is indicated in the "constant" column Only a decimal (K) or hexadecimal (H) constant may be used. Real number constants (E) and character string constants ($) may not be used.

  • Page 78: Step Operation Status Check Instructions (A, B, &A, &B, |A, |B) [Sn/Blm\Sn]

    Step operation status check instructions (a, b, &a, &b, |a, |b) [Sn/ BLm\Sn] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File...
  • Page 79 Function • Checks a specified step in a specified block to determine if the step is active or inactive. • The contact status changes as described below depending on whether the specified step is inactive or active. Contact of N/O Contact Instruction Contact of N/C Contact Instruction Inactive Active...
  • Page 80 • The following program executes a step synchronously with another step of a parallel branch. ■Related Instructions SFC control instructions • Block switching instruction (BRSET) (Refer to  Page 103 Block switching instruction (BRSET).) • Step control instruction (SCHG) (Refer to  Page 101 Active step change instruction (SCHG).) •...

  • Page 81: Forced Transition Check Instruction (A, B, &A, &B, |A, |B) [Trn/Blm\Trn]

    Forced transition check instruction (a, b, &a, &b, |a, |b) [TRn/ BLm\TRn] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       Usable Devices Internal device File Link Direct J\ Intelligent Index Z...
  • Page 82 Function • Checks whether or not the specified transition condition of the specified block is specified for forced transition by the forced transition EXECUTE instruction (sBLm\TRn). • The contact status changes as described below depending on whether the specified transition condition is specified for a forced transition or not.
  • Page 83 ■Related Instructions SFC control instructions • Transition control instructions (sTRn, sBLm\TRn) (Refer to  Page 99 Forced transition EXECUTE & CANCEL instructions (s, r) [TRn/BLm\TRn].) • Transition control instructions (rTRn, rBLm\TRn) (Refer to  Page 99 Forced transition EXECUTE & CANCEL instructions (s, r) [TRn/BLm\TRn].) •...

  • Page 84: Block Operation Status Check Instruction (A, B, &A, &B, |A, |B) [Blm]

    Block operation status check instruction (a, b, &a, &b, |a, |b) [BLm] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File...
  • Page 85 Program example • The following program turns ON Y20 when block 3 is active. ■Related Instructions SFC control instructions • Block START instruction (sBLm) and block END instruction (rBLm) (Refer to  Page 90 Block START & END instructions (s, r) [BLm].) SFC diagram symbols ) (Refer to ...

  • Page 86: Active Step Batch Readout (Mov And Dmov)

    Active step batch readout (MOV and DMOV) QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File Link Direct J\...
  • Page 87 • When the block is not specified, specify the step number with which the read data range does not exceed the maximum step No. in the block. Item Description If the maximum number of steps data will be undefined. For example, when the last step of the block to be read is step 10 (S10), data in b11 to 15 will be is exceeded undefined.
  • Page 88 Operation Error Error code Description 4101 • If exceeding the maximum step No. (8191) when block specification is not made (for the Universal model QCPU or LCPU) • If specifying the stop which does not exist when block specification is not made (for the Universal model QCPU or LCPU) Program Examples •...

  • Page 89: Active Step Batch Readout (Bmov)

    Active step batch readout (BMOV) QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File Link Direct J\...
  • Page 90 When "BMOV BL1\S2 D0 K2" is executed in the following case, • Block 1: The maximum step No. is 10 (S10) and step 5 (S5) and step 8 (S8) do not exist • Block 2: The maximum step No. is 12 (S12) and step 3 (S3) does not exist •...
  • Page 91 Operation Error Error code Description 4101 When the step relay (Sn) range is exceeded Program Examples • The following program reads the active step status of 48 steps (3 words), starting from step 0 of block 3, to D0 - D2 when X0 turns ON.

  • Page 92: Block Start & End Instructions (S, R) [Blm]

    Block START & END instructions (s, r) [BLm] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File Link Direct J\...
  • Page 93 Operation Error Error code Description 4621 When the specified block does not exist or when the SFC program is in the stand-by status Program Examples • When X1 switches ON, the following program forcibly activates block 1. When X2 switches ON, it ends and forcibly deactivates block 1.

  • Page 94: Block Stop And Restart Instructions (Pause, Rstart) [Blm]

    Block STOP and RESTART instructions (PAUSE, RSTART) [BLm] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File Link Direct J\...
  • Page 95 Setting of Operation Status of Operation Output Mode Output at STOP-time Active step other than Held step at Block Stop Block Stop Mode Bit held step (including Coil HOLD step Operation HOLD Operation HOLD in PLC (SM325) HOLD step whose (SC) step (without step (with...
  • Page 96 Operation Error Error code Description 4621 When the specified block does not exist or when the SFC program is in the stand-by status Program Examples • Block 1 is stopped when X1 switches ON, and is restarted when X2 switches ON. ■Related Instructions SFC information device •...

  • Page 97: Step Start And End Instructions (S, R) [Sn/Blm\Sn]

    Step START and END instructions (s, r) [Sn/BLm\Sn] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 04122 or later. Usable Devices Internal device File Link Direct J\...
  • Page 98 Item Description When the specified block is If the step is already active when the SET instruction is executed, the step will remain active and processing will continue, with active: another step being designated as active. (Multiple step activation, follow-up function.) Processing is performed as shown below when step 1 in block 1 is started in the sequence program.
  • Page 99 ■Step END instruction (r) • A specified step at a specified block is forcibly deactivated. "Coil HOLD" and "operation HOLD" steps are subject to this instruction. • When the number of active steps in the corresponding block reaches 0 due to the execution of this instruction, END step processing is performed and the block becomes inactive.
  • Page 100 Program Examples • When X1 switches ON, the following program will select and start step 2 of block 1 which contains multiple initial steps. When step is designated by operation output of block 1 (Block1) When step is designated by operation output of other than block 3 When step is designated by sequence program •...

  • Page 101: Forced Transition Execute & Cancel Instructions (S, R) [Trn/Blm\Trn]

    Forced transition EXECUTE & CANCEL instructions (s, r) [TRn/ BLm\TRn] QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       Usable Devices Internal device File Link Direct J\ Intelligent Index Z Constant Expansion Other...
  • Page 102 Program Examples • When X1 switches ON, the following program executes a forced transition at transition condition 1 of block 1. The forced transition setting is canceled when X2 switches ON. When step is designated by operation output of block 1 When step is designated by operation output of other than block 1 When step is designated by sequence program This instruction checks, from the first sequence step of the specified block in series, whether or not the...

  • Page 103: Active Step Change Instruction (Schg)

    Active step change instruction (SCHG) QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       Usable Devices Internal device File Link Direct J\ Intelligent Index Z Constant Expansion Other (System, User) Register Function Module...
  • Page 104 Program Examples • The following program causes a transition as-is when X10 has turned ON before X1 turns ON, and deactivates step 5 and activates step 6 when X1 has turned ON before X10 turns ON. The program created with MELSAP3 is as shown below. 4 SFC PROGRAM CONFIGURATION 4.4 Controlling SFC Programs by Instructions (SFC Control Instructions)

  • Page 105: Block Switching Instruction (Brset)

    Block switching instruction (BRSET) QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 13102 or later. Usable Devices Internal device File Link Direct J\...
  • Page 106 Operation Error Error code Description 4621 When the specified block does not exist or when the SFC program is in the stand-by status. Program Examples • When X1 switches ON, the following program switches the Sn or TRn block number to the block number stored at the D0 data register.

  • Page 107: Sfc Information Devices

    SFC Information Devices This section describes the SFC information devices set in each block. The following table lists the SFC information device types and usable devices. SFC Information Function Outline Usable QCPU, Devices Device LCPU  Block START/END bit • Device designed to forcibly start or forcibly end the specified block by a sequence program or Y, M, L, F, the test operation of the peripheral device.

  • Page 108: Block Start/End Bit

    Block START/END bit The block START/END bit is used to confirm the active status of the specified block by a sequence program or the test operation of the peripheral device. It can also be used as a device to forcibly start or forcibly end the specified block. •...
  • Page 109 Program example Use the contact of the "block START/END bit" when a transition occurs after block 1 ends. ■Related Instructions SFC control instructions • Block START instruction (sBLm), block END instruction (rBLm) (Refer to  Page 90 Block START & END instructions (s, r) [BLm].) SFC diagram symbols ) (Refer to ...

  • Page 110: Step Transition Bit

    Step transition bit The step transition bit is designed to check whether the transition condition of the step in execution has been satisfied or not. • After the operation output at each step is completed, the step transition bit automatically switches ON when the transition condition (for transition to the next step) is satisfied.
  • Page 111 • At active parallel branch steps, the transition bit will switch ON when any of the transition conditions are satisfied. 4 SFC PROGRAM CONFIGURATION 4.5 SFC Information Devices...

  • Page 112: Block Stop/Restart Bit

    Block STOP/RESTART bit The block STOP/RESTART bit is used to temporarily stop processing while the corresponding block is active. • When the designated block STOP/RESTART bit is switched ON by the sequence program or peripheral device, processing will be stopped at the current step of the block in question. If a START status is in effect at another block, the STOP will still occur, but the START destination block will remain active and processing will continue.
  • Page 113 • The execution of the corresponding block is restarted from the step where it had stopped when the "block STOP/RESTART bit" is turned OFF in the sequence program, SFC program or peripheral device. An "operation HOLD status" step (with transition check or without transition check) which has been stopped will be restarted with the operation HOLD status in effect.

  • Page 114: Block Stop Mode Bit

    Block STOP mode bit The block STOP mode bit setting determines when the specified block is stopped after the block STOP/RESTART bit switches ON, or after a stop designation by the block STOP instruction (PAUSE BLm). • The stop timing for a block where a STOP request has occurred varies according to the ON/OFF setting of the block STOP mode bit, as shown below.
  • Page 115 The operation of SM325 differs depending on the CPU module. • For the Basic model QCPU, High Performance model QCPU, and Process CPU SM325 turns ON/OFF according to the parameter setting (output mode setting at block stop) when the CPU module is powered ON or is reset.

  • Page 116: Continuous Transition Bit

    Continuous transition bit The continuous transition bit specifies whether the operation output of the next step will be executed in the same scan or not when the transition condition is satisfied. • There are two types of SFC program transition processing: "with continuous transition" and "without continuous transition". The user specifies either of them by turning ON/OFF the continuous transition bit.
  • Page 117 • The continuous transition disable flag (SM324) is always ON (turned ON automatically by the system at SFC program execution) normally, but is OFF during continuous transition. Use of SM324 under the AND condition in a transition condition disables a continuous transition. [SFC program] [Operation] When M0 is ON, step 1 to step 4 are the targets of continuous transition.

  • Page 118: Number Of Active Steps Register

    Number of active steps register The "number of active steps" value for a given block is stored at this register. • The "number of active steps" value for a given block is stored. • The number of active steps applies to the following steps. •...

  • Page 119: Step Transition Watchdog Timer

    Step Transition Watchdog Timer The step transition watchdog timers are timers that measure the time from the point when the relevant step is placed in the execution status until the point when a transition to the next step occurs. If a transition from the relevant step to the next step fails to occur within the designated time period, the preset annunciator (F) will be turned ON.
  • Page 120 • The method for using a step transition watchdog timer is shown below. When SM90 is turned ON in the operation output of the step that performs a time check as shown below, the step transition watchdog timer starts timing. If transition condition a is not satisfied within the set time (10s) after SM90 has turned ON, annunciator F1 turns ON.

  • Page 121: Sfc Operation Mode Setting

    SFC Operation Mode Setting The SFC operation mode setting is used to designate SFC program START conditions, or to designate the processing method at a double START. Some settings can be made in "SFC setting of PLC parameter dialog box" in the system common setting and the others can be made in "block parameter"...

  • Page 122: Sfc Program Start Mode

    SFC program start mode The SFC program start mode setting determines whether an SFC program START (SM321 OFF  ON) is executed by an "Initial start", or by a Resume start from the preceding execution status. Settings and corresponding operations Set whether "initial start"...
  • Page 123 *6 An initial start is always performed in the Basic model QCPU and the Universal model QCPU with serial number (first five digits) "11042" or earlier. *7 The status (ON/OFF) of the output is determined according to the "Output Mode at STOP to RUN" setting in PLC parameter. •...

  • Page 124: Block 0 Start Condition

    Block 0 START condition The block 0 START condition is designed to set whether block 0 will be automatically activated or not at SFC program START (when SM321 turns from OFF to ON). Use the block 0 START condition when it is desired to specify the START block at SFC program START according to the product type, etc.

  • Page 125: Output Mode At Block Stop

    Output mode at block STOP The "output mode at block STOP" is designed to set whether the coil outputs turned ON by the OUT instruction will be held at the time of a stop (coil output held) or all coil outputs will be forcibly turned OFF (coil output OFF) when the corresponding block is stopped temporarily.
  • Page 126 ■SM325 The operation of SM325 differs depending on the CPU module. • For the Basic model QCPU, High Performance model QCPU, and Process CPU SM325 turns ON/OFF according to the parameter setting (output mode setting at block stop) when the CPU module is powered ON or is reset.

  • Page 127: Periodic Execution Block Setting

    Periodic execution block setting The periodic execution block setting designates the execution of a given block at specified time intervals rather than at each scan. Setting items Designate the first block number and the time of execution for the periodic execution blocks. When these settings are designated, the "first block"...

  • Page 128: Operation Mode At Double Block Start

    Operation mode at double block START This mode setting designates the operation mode which is to be effective when a block START request occurs (by block START step (Bm , Bm )) for a block which is already started. Settings and corresponding operations Set the operation mode at block double START to either STOP or WAIT in the "block parameter"...

  • Page 129: Operation Mode At Transition To Active Step (Double Step Start)

    Operation mode at transition to active step (double step START) This mode setting designates the operation mode which is to be effective when a follow-up function such as an operation HOLD step (with transition check) is used to execute a transition to a step which is already active. Settings and corresponding operations For a transition to an active step, set any of STOP, WAIT and TRANSFER in the "block parameter"...
  • Page 130 Operation at double START ■When transition destination is serial transition • When setting is "STOP": If the transition destination is active, an error occurs and the processing of the CPU module stops. • When setting is "WAIT": Execution waits until the transition destination step becomes inactive. When the transition destination step becomes inactive, a transition is executed and the transition destination step becomes active.
  • Page 131 ■When transition destination is parallel branch • When setting is "STOP": If any one of the transition destinations of the parallel branch is active, an error occurs and the processing of the CPU module stops. • When setting is "WAIT": Execution waits until all the transition destination steps of the parallel branch become inactive. When the transition destination steps all become inactive, a transition is executed and all the first steps of the parallel branch become active.

  • Page 132: Sfc Comment Readout Instruction

    SFC Comment Readout Instruction SFC comment readout instruction can read comments of steps being activated in the specified blocks or those of the transition condition associated with active steps. The instructions to read SFC comment are listed below. Name Ladder Expression Function Instruction to read SFC step comment S.SFCSCOMR...

  • Page 133: Sfc Comment Readout Instruction (S(P). Sfcscomr)

    SFC comment readout instruction (S(P). SFCSCOMR) QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 07012 or later. *2 The serial number (first five digits) shall be 07032 or later. Usable Devices Internal device File Register R...
  • Page 134 *3 Comments to be read are stored as follows. Area name Data to be stored Total number of steps • 0000 is stored at S(P). SFCSCOMR instruction, and the total number of steps are stored at completion of comment readout. Number of steps that have read •...
  • Page 135 Functions • This function reads step comments being activated in the SFC block specified at n1, by the number of comment specified at n2, and stores those to the device number of after specified at (d1). Positioning complete for material A Positioning complete for material B Processing complete for all materials •...
  • Page 136 • Reading comment is performed at END processing for a scan that has executed S(P).SFCSCOMR instruction. With per END processing, this function reads the number of comments specified at the number of comments in a single 1 scan (n3). Comments that are not read in per END processing are followed to the next scan. Reading comments for active steps (maximum: the number specified at n2) is completed, the device specified at (d2) turns ON for 1 scan.
  • Page 137 Even if a command for SP.SFCSCOMR instruction turns ON, SP.SFCSCOMR instruction is not executed. • For the comment files to be used with S(P).SFCSCOMR, set them in the PLC File tab of the PLC parameter dialog box or at "file set instruction (QCDSET(P)) for comments". Executing S(P). SFCSCOMR without setting the comment file to use, 0 is stored to "the total number of steps ((d1) +0)"...
  • Page 138 Precautions • Make sure to use comments to be read with S(P).SFCSCOMR after the device specified at (d2) turns ON. Comments to be read before the device specified at (d2) turns ON become an indefinite value. • If the number of steps is larger than that of comments (n3) read in a single scan, the active step comments are divided into the number to be read in a single scan.
  • Page 139 Program Example • This program reads 2 comments being activated at the SFC block No.1 when X1 is turned ON, and stores those to the storage device after D0. (The number of comment to be read in a single scan is also set in 2.) An interlock ladder to execute "batch write of SFC program in RUN status", "online change (inactive block)", and "write of comment file in RUN status"...

  • Page 140: Sfc Transition Comment Readout Instruction (S(P). Sfctcomr)

    SFC transition comment readout instruction (S(P). SFCTCOMR) QCPU LCPU Programmable controller CPU Process CPU Redundant CPU Basic High Performance Universal       *1 The serial number (first five digits) shall be 07012 or later. *2 The serial number (first five digits) shall be 07032 or later. Usable Devices Internal device File Register R...
  • Page 141 Area name Data to be stored Total number of transition conditions • 0000 is stored at S(P).SFCTCOMR instruction, and the total number of transition conditions associated with the steps activated when reading comments completed are stored. (Maximum of up to 256 detected) Number of transition conditions that have •...
  • Page 142 Functions • This function reads comments of the transition condition associated with steps activated in the SFC block specified at n1 with the number of comments specified at n2, and stores those to the device number of after specified at (d1). *1 Transition condition associated with active steps is shown below.
  • Page 143 • Executing S(P).SFCTCOMR instruction, SM735 of the special relay (SFC comment readout instruction executing flag) turns ON. Confirms whether or not S(P).SFCTCOMR instruction is executed by SM735. • In case comments are not set into active steps, "2DH(-)" is stored to the comment area (word length of 32 characters). •...
  • Page 144 • The operation when a command of S(P).SFCTCOMR instruction is in ON status at S(P).SFCTCOMR instruction execution completed is as follows. S.SFCTCOMR instruction re-executes when a command for S.SFCTCOMR instruction is in ON status. Even if a command for SP.SFCTCOMR instruction turns ON, SP.SFCTCOMR instruction is not executed. •...
  • Page 145 • While SFC program is not executed, reading comments is not performed even if executing S(P).SFCTCOMR instruction. Executing S(P).SFCTCOMR at a status of SFC program not being activated, 0 is stored to "total number of transition conditions ((d1) +0)" and "the number of transition condition that have read comments ((d1) +1)". At this time, the device specified in (d2) turns ON for 1 scan.
  • Page 146 Program Example • This program reads 2 comments associated with steps being activated at the SFC block No.1 when X1 is turned ON, and stores those to the storage device after D0. (The number of comment to be read in a single scan is also set in 2.) An interlock ladder to execute "batch write of SFC program in RUN status", "online change (inactive block)", and "write of comment file in RUN status"...

  • Page 147: Chapter 5 Sfc Program Processing Sequence

    SFC PROGRAM PROCESSING SEQUENCE This chapter describes the processing sequence of the SFC programs. Whole Program Processing of Basic Model QCPU This section describes the program processing of the Basic model QCPU. Since this manual describes only the outline, refer to the QCPU User's Manual (Function Explanation, Programming Fundamentals) for details.

  • Page 148: Whole Program Processing Of High Performance Model Qcpu, Process Cpu, Redundant Cpu, Universal Model Qcpu, And Lcpu

    Whole Program Processing of High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU, and LCPU This section explains the whole program processing of the High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU, and LCPU. Since this manual describes only the outline, refer to the QCPU User's Manual (Function Explanation, Programming Fundamentals) for details.
  • Page 149 Execution Type Description SFC Compatibility  Stand-by type program (wait) • Programs such as a subroutine program and Max. 124 programs (changes depending on the CPU interrupt program. module type) • Started by the program START instruction for SFC program execution.

  • Page 150: Execution Type Designation By Instructions

    Execution type designation by instructions The "execution designation by instruction" function enables the execution type set in the program setting of the PLC parameter dialog box to be changed by the instruction. This function can be applied to normal SFC programs only. (Inapplicable to the SFC programs for program execution management.) Instructions and corresponding operations The following shows instructions and corresponding operations.
  • Page 151 Processing time required to switch SFC program from WAIT status to scan status The processing time required to switch an SFC program from a WAIT status to a scan status is shown below. Although the scanning time is extended by the amount of the processing time, this will not result in a watchdog timer error detection. No system processing time is required when switching from a scan status to a WAIT status.

  • Page 152: Sfc Program For Program Execution Management

    SFC program for program execution management This SFC program can be used to manage the program execution sequence when multiple program file switching is required. In addition to a normal SFC program, only one block can be created and executed for a single file of an SFC program for program execution management.
  • Page 153 Example of program execution management SFC programs In the following example, SFC program ABC is executed when condition 1 is satisfied, and SFC program XYZ is executed when condition 2 is satisfied. 5 SFC PROGRAM PROCESSING SEQUENCE 5.2 Whole Program Processing of High Performance Model QCPU, Process CPU, Redundant CPU, Universal Model QCPU, and...

  • Page 154: Sfc Program Processing Sequence

    SFC Program Processing Sequence This section describes the SFC program processing sequence. SFC program execution The SFC program is executed once per scan. Basic model QCPU The Basic model QCPU executes a sequence program and then executes a SFC program. The program execution status is shown below under the following condition.
  • Page 155 QCPU (except Basic model QCPU), LCPU The High Performance model QCPU, Process CPU, Redundant CPU, Universal model QCPU, and LCPU can store multiple programs in the program memory and execute them. (Scan execution is enabled for two SFC programs (one SFC program for program execution management and one normal SFC program).

  • Page 156: Block Execution Sequence

    Block execution sequence In the SFC program, the step in the active block is executed every scan. When there are multiple blocks, the blocks are processed in order of lower to higher block numbers. • In the active block, the active step in that block is executed. •...

  • Page 157: Step Execution Sequence

    Step execution sequence In the SFC program, the operation outputs of all active steps are processed within one scan. At the end of the operation output execution at each step, whether the transition condition to the next step is satisfied or not is checked.

  • Page 158: Continuous Transition On/Off Operation

    Continuous transition ON/OFF operation There are two types of SFC program transition processing: "with continuous transition" and "without continuous transition". Set "with continuous transition" or "without continuous transition" using the continuous transition bit of the SFC information devices. When the device set to the continuous transition bit is turned ON/OFF by the user, operation is performed as described below.
  • Page 159 END processing is performed after all the program files set to the "scan execution type" in the program setting of the PLC parameter dialog box have been executed. Refer to the QCPU User's Manual (Function Explanation, Programming Fundamentals) for the detailed processing order of the programs other than the SFC program and their processings.

  • Page 160: Chapter 6 Sfc Program Execution

    SFC PROGRAM EXECUTION This chapter describes the SFC program execution. SFC Program START and STOP There are the following four types of SFC program start and stop methods. • Auto START using PLC parameter • Start and stop using the special relay for SFC program start/stop (SM321) •...

  • Page 161: Sfc Program Resumptive Start Procedure

    SFC program resumptive START procedure The SFC program START format can be designated as "initial START" or "resumptive START". The "resumptive START" setting procedure as well as some precautions regarding the "resumptive START" format are described below. Resumptive START setting procedure Make the resume START setting of the SFC program in the "SFC Program Start Mode"...

  • Page 162: Block Start And End

    Block START and END This section describes the block START and END. Block START methods The block START methods during SFC program execution are described below. As shown below, there are several block START methods. Choose the method which is most suitable for the purpose at hand. : Usable, : Unusable START Method Operation Description...

  • Page 163: Block End Methods

    Block END methods The methods for ending block operations are described below. As shown below, there are several block END methods. Choose the method which is most suitable for the purpose at hand. END Method Operation Description Remarks Block END by SFC diagram symbol Block processing is ended and the block is deactivated •...

  • Page 164: Block Temporary Stop And Restart Methods

    Block Temporary Stop and Restart Methods This section describes the block temporary stop and restart methods Block STOP methods The temporary block STOP methods which can be used during SFC program execution are described below. Block STOP methods The methods for temporarily stopping a block during SFC program operation are shown below. STOP Method Operation Description Remarks...

  • Page 165: Restarting A Stopped Block

    Operation of SM325 The operation of SM325 differs depending on the CPU module. ■For the Basic model QCPU, High Performance model QCPU, and Process CPU SM325 turns ON/OFF according to the parameter setting (output mode setting at block stop) at STOP RUN of the CPU module.

  • Page 166: Step Start (Activate) And End (Deactivate) Methods

    Step START (Activate) and END (Deactivate) Methods This section describes the step START (Activate) and END (Deactivate) methods. Step START (activate) methods There are the following step START (activation) methods. Step START (Activation) Operation Remarks Method Step START by SFC diagram symbol The corresponding step is automatically started when the Basic operation of SFC program preceding transition condition is satisfied.

  • Page 167: Changing An Active Step Status (Not Available For Basic Model Qcpu, Universal Model Qcpu, And Lcpu)

    Changing an active step status (Not available for Basic model QCPU, Universal model QCPU, and LCPU) This section describes the method for ending (deactivating) an active step and starting (activating) the specified step. Changing Method Operation Remarks Change by SFC control instruction At the step (operation output) of the SFC program, the •...

  • Page 168: Operation Methods For Continuous Transition

    Operation Methods for Continuous Transition If "with continuous transition" is set, whether a continuous transition will be performed or not can be selected at each step using the continuous transition disable flag (SM324). Processing performed when continuous transition disable flag is not used SFC Program With Continuous Transition Without Continuous Transition...

  • Page 169: Operation At Program Change

    Operation at Program Change SFC programs of the CPU module can be changed by executing any of the following functions. • Write to PLC (write in file unit) • Online change (write in ladder block unit) • Online change (inactive block) The following table lists changes that can be made to the SFC programs by executing each function above.

  • Page 170: Operation At Program Change Made By Write To Plc

    Operation at program change made by write to PLC This section describes the operation at program change made by write to PLC. When program was written with CPU module in PAUSE/STOP status ■Program start after write to PLC An initial start is performed independently of the SFC start mode setting (initial start/resume start). Depending on the SFC program change, however, an initial start is not made but a resume start may be made at the resume start setting.

  • Page 171: Online Change (Inactive Block)

    Online change (inactive block) An inactive SFC block can be changed in units of blocks. This function can be executed only when a CPU module and GX Works2 are used in the following combination. • Universal model QCPU other than the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU (serial number (first five digits) is "12052"...
  • Page 172 Area to be overwritten This section describes the area to be overwritten. ■Area to be changed All programs of the target block are overwritten. Multiple blocks cannot be batch-written. In online change (inactive block), a program (before change) in a programming tool is not verified with the program in the CPU module. Therefore, verifying an SFC program in the programming tool with that in the CPU module beforehand is recommended.
  • Page 173 ■Operation when the target block is attempted to be started while online change (inactive block) is executed The target block does not start. The following table shows operations depending on block start method. Start method (activation method) Operation at block start Block START step (without END check) •...
  • Page 174 ■Reserved area for online change Secure reserved area for online change by the amount to be added/changed by online change (inactive block). • Adding/changing an SFC information device When all SFC information devices are not set for the target block, SFC information device area will not be created in the program file.
  • Page 175 ■Precautions • If GX Works executes online change (inactive block) while another GX Works2 executes online change or program backup, the online change (inactive block) cannot be performed. The online change (inactive block) cannot be performed, if another GX works executes online change or program backup while GX Works2 executes online change (inactive block). •...

  • Page 176: Appendices

    APPENDICES Appendix 1 Special Relay and Special Register List This section lists the special relays and special registers that can be used in SFC programs. For the special relays and special registers for other programs, refer to the user's manual for the CPU module used. The heading descriptions in the lists are shown in the table below.

  • Page 177: Special Relay (Sm) List

    Special Relay (SM) List The following table lists the special relays that can be used in the SFC programs. Number Name Meaning Explanation Set by Corresponding CPU (When set) SM90 Step transition OFF: Not started • Switched ON to begin the ...
  • Page 178 Number Name Meaning Explanation Set by Corresponding CPU (When set)      SM320 SFC program OFF: Not started • Switched ON to begin the S (Initial) presence/absence (Watchdog timer reset) step transition watchdog ON: Started (Watchdog timer count. timer start) •...
  • Page 179 Number Name Meaning Explanation Set by Corresponding CPU (When set) SM324 Continuous transition OFF: After transition • OFF during operation in S (Instruction      disable flag ON: Before transition the "with continuous execution) transition" mode or during S (Status change) continuous transition, and ON when not during...
  • Page 180 Number Name Meaning Explanation Set by Corresponding CPU (When set)      SM329 Online change OFF: Not executed This relay indicates the S (Status change) (inactive block) status ON: Being executed execution status of online flag change (inactive block). SM331 Normal SFC program •...

  • Page 181: Special Register (Sd) List

    Special Register (SD) List The following table lists the special registers that can be used in the SFC programs. Number Name Meaning Explanation Set by Corresponding CPU (When set) SD90 Step transition Timer set value and F • Set the set time of the step transition ...

  • Page 182: And Alternative Methods

    Appendix 2 Restrictions on Basic Model QCPU, Universal Model QCPU, and LCPU and Alternative Methods This section explains the restrictions on use of SFC programs for the Basic model QCPU, Universal model QCPU, and LCPU. Function comparison Item Basic Mode QCPU, High Performance Model Alternative Universal model QCPU,...

  • Page 183: Step Transition Watchdog Timer Replacement Method

    Step Transition Watchdog Timer Replacement Method Operation of step transition watchdog timer The step watchdog timer measures the ON time of the special relay for step transition watchdog timer start (SM90 to SM99), and when it exceeds the time set to the special register for step transition watchdog timer setting (SD90 to SD99), the corresponding annunciator (F) set to any of (SD90 to SD99) is turned ON.

  • Page 184: Periodic Execution Block Replacement Method

    Periodic Execution Block Replacement Method Operation of periodic execution block A periodic execution block is executed in each scan where the specified execution interval has elapsed. The following figure shows the operation performed when blocks 0, 1, 2, 10 and 11 are used and blocks 10 and 11 are set as the periodic execution blocks.

  • Page 185: Forced Transition Bit (Trn) Replacement Method

    Forced Transition Bit (TRn) Replacement Method Operation by forced transition bit The forced transition bit forcibly satisfies a transition condition. When the forced transition bits are used, the preset input conditions can be ignored and the transition conditions can be satisfied in due order. Forced transition bit replacement method Describe any bit device in the transition condition, where it is desired to cause a forced transition, under the OR condition and turn ON the bit device described under the OR condition to cause a forced transition.

  • Page 186: Active Step Change Instruction (Schg) Replacement Method

    Active Step Change Instruction (SCHG) Replacement Method Operation of active step change instruction The active step change instruction deactivates the instruction-executed step and forcibly activates the specified step in the same block. Active step change instruction replacement method Using a jump transition and selection branching, create a program that will cause a jump to the specified step when the transition condition is established.
  • Page 187 MEMO APPENDICES Appendix 2 Restrictions on Basic Model QCPU, Universal Model QCPU, and LCPU and Alternative Methods...

  • Page 188: Index

    INDEX ..... . . 6 Basic model QCPU ......6 GX Developer .
  • Page 189 MEMO...

  • Page 190: Instruction Index

    INSTRUCTION INDEX Symbols ......76,79,82 &a ......76,79,82 &b .
  • Page 191 MEMO...

  • Page 192: Revisions

    Japanese manual version SH-080072-W This manual confers no industrial property rights of any other kind, nor does it confer any patent licenses. Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may occur as a result of using the contents noted in this manual.

  • Page 193: Warranty

    WARRANTY Please confirm the following product warranty details before using this product. 1. Gratis Warranty Term and Gratis Warranty Range If any faults or defects (hereinafter "Failure") found to be the responsibility of Mitsubishi occurs during use of the product within the gratis warranty term, the product shall be repaired at no cost via the sales representative or Mitsubishi Service Company.

  • Page 194: Trademarks

    TRADEMARKS Ethernet is a registered trademark of Fuji Xerox Co., Ltd. in Japan. Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. Unicode is either a registered trademark or a trademark of Unicode, Inc. in the United States and other countries. The company names, system names and product names mentioned in this manual are either registered trademarks or trademarks of their respective companies.
  • Page 196 SH(NA)-080076-U(1703)MEE MODEL: QCPU-P-E(SAP-L) MODEL CODE: 13JF61 HEAD OFFICE : TOKYO BUILDING, 2-7-3 MARUNOUCHI, CHIYODA-KU, TOKYO 100-8310, JAPAN NAGOYA WORKS : 1-14 , YADA-MINAMI 5-CHOME , HIGASHI-KU, NAGOYA , JAPAN When exported from Japan, this manual does not require application to the Ministry of Economy, Trade and Industry for service transaction permission.

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