A
B
C
SCHEMATIC DIAGRAM (DSP1 1/2)
1
4.9
4.2
4.9
0.1
0.2
4.2
4.9
0.6
4.2
0.4
0.3
0.3
-0.4
-0.4
-0.4
4.8
2
0
4.8
4.3
4.8
0
SIGNAL DETECT
4.8
4.8
0
0
0
0
4.8
2.8
0.6
0
0
0
3
0
0
0
2.8
0.6
0
4.8
0
0
0
0
0
2.8
0.6
0
4.8
0
0
4.8
0.6
0
0
4.8
0
2.8
0
0
4
0
COAXIAL INPUT SELECTOR
0.4
0
4.8
5
4.2
0
4.8
COAXIAL
REC OUT
0.4
SELECTOR
0
4.8
0
6
0.4
0
OPTICAL
4.8
INPUT
SELECTOR
0.4
0
4.8
0.4
OPTICAL
7
0
REC OUT
4.8
SELECTOR
0.4
0
4.8
4.9
DUTY CORRECTER
3.6
0
0
4.9
4.9
0
8
0
4.9
4.9
0
0
0
0
4.9
3.6
0
0
3.6
4.9
0
0
0
4.9
0
4.9
0
0
3.6
4.9
0
0
9
4.9
0
4.9
0.3
0
3.6
4.9
2.6
0
4.9
0
IC2, 12, 16 : 74VHCT00AMTCX
IC1, 3, 5, 11 : 74VHCU04MTCX
Quad 2 Input NAND
Hex Inverters
IC10 : NJM2904M-T1
A1
1
14
V
1A
1
IC15 : µPC4570G2
DD
Dual OP-Amp
B1
2
13
B4
1Y
2
10
Y1
3
12
A4
2A
3
A2
4
11
Y4
2Y
4
OUT
1
1
8
+V
CC
B2
5
10
B3
3A
5
–IN
1
2
7
OUT
2
+
–
+
–
+IN
1
3
6
–IN
2
Y2
6
9
A3
3Y
6
–V
4
5
+IN
7
CC
2
V
SS
7
8
Y3
V
SS
D
E
F
4.9
4.2
4.0
0.1
3.4
4.9
0.1
0.2
-0.4
4.5
0
-3.4
4.8
4.0
2.4
0
AC-3
DEMODULATOR
4.8
0
4.8
0
DIGITAL IN
(COAXIAL)
0
0
0
4.8
0
4.8
4.8
0
4.8
3.6
0.3
3.6
4.8
3.6
4.8
3.6
0.3
3.6
3.6
0
0
0
1
1.9
0
1.9
3.6
0.2
0
1.9
2.3
0
1.9
0
0.7
0
3.5
0
3.6
0
DIR
0
3.6
0
0
1.9
3.6
0
0
3.6
0
3.6
0
0
1.9
0
0
1.9
1.9
3.6
0
0
DIGITAL IN
0
3.6
0
1.9
0
3.6
3.6
0
4.6
3.6
0
0
4.6
3.6
0
3.6
0
0
0
0
0
0
0
0
0
REGULATOR
0
0
0
4.5
2.9
3.0
2.0
3.6
0
0
0
0
0
0.3
0
0
2.9
4.9
4.9
0
0
0
0
4.9
0
0
14
V
DD
13
6A
IC71 : SN74LVC2G17DCKR
IC4 : SN74AHC1G04DCKR
12
6Y
Dual Schmitt Trigger Buffers
Single Inverter Gate
DC INPUT (VIN)
11
5A
VCC
1A 1
6
1Y
10
5Y
NC
1
5
2
GND
2
5
VCC
9
4A
2A
ON/OFF CONTROL (VC) 2
GND
3
4
2Y
2A
3
4
2Y
8
4Y
G
H
2
4.8
2.5
2.5
0.8
-4.8
4.8
0.8
256K SRAM
4.8
3.6
4.8
3.6
4.8
4.8
0
4.8
0.3
4.8
4.8
4.8
3.6
4.8
4.8
4.8
3.6
4.8
4.8
3.6
4.8
4.8
0
3.6
1.2
0
0
3.6
4.8
1.2
0
0.3
1.2
4.8
0
3.6
0
0
1.2
0
0
0
2.1
0
0
0
0
0
1.2
0
4.8
4.8
0
0
4.8
0
1.2
4.8
3.6
0
3.6
0
0.5
0
0
2.5
3.2
A/D IN
3.6
0
AUDIO SIGNAL SELECTOR
0
0
0
0
L/R
3.6
1.7
1.7
SL/SR
0
2.0
SBL/SBR
0
0
PL/PR
2.0
0
1.7
SWL/SWR
0
3.6
C+/C-
4.6
3.6
4.6
3.6
3.6
3.6
0
0
0
3.6
0
0
4.9
0.7
3.6
3.6
3.6
3.6
3.6
3.6
0
3.6
0
0.3
0
0
4.7
3.6
4.7
3.6
3.6
0
3.6
3.6
3.5
0
3.6
3.6
0
IC17 : PQ070XZ5MZP
IC20 : PQ018EZ01ZP
Rgulator
Rgulator
1
3
DC OUTPUT (VO)
DC INPUT (VIN)
1
3
DC OUTPUT (VO)
SPECIFIC IC
I C
4
OUTPUT ADJUSTMENT (VADJ)
2
ON/OFF CONTROL (VC)
5
5
GND
GND
I
J
K
3.1
0
0
0
0
3.8
SUB CPU
3.5
0
3.6
3.7
0.5
0
3
3.5
3.6
0.7
0
0
0.6
EUROPE
L
M
N
RX-Z9/DSP-Z9
Point q (Pin 29 of IC14)
V : 2V/div, H : 40nsec/div
DC, 1 : 1 probe
0V
Point w (Pin 55 of IC18)
V : 2V/div, H : 40nsec/div
DC, 1 : 1 probe
0V
Point e (Pin 13 of IC27)
V : 2V/div, H : 40nsec/div
DC, 1 : 1 probe
0V
IC25 : CY62256LL-70SNCT
35K x 8 Static RAM
A5
1
28
VCC
A6
2
27
WE
A7
3
26
A4
A8
4
25
A3
A9
5
24
A2
A10
6
A1
23
A11
OE
7
22
A12
8
21
A0
A13
9
20
CE
A14
10
19
I/O7
I/O0
11
18
I/O6
I/O1
12
17
I/O5
I/O2
13
16
I/O4
GND
14
I/O3
15
I/O0
INPUT BUFFER
I/O1
A10
A9
I/O2
A8
A7
512 X 512
I/O3
A6
A5
ARRAY
I/O4
A4
A3
I/O5
A2
I/O6
CE
POWER
COLUMN
I/O7
DOWN
WE
DECODER
OE
IC21 : XC9572XL-10TQ100
CPLD
3
JTAG
IN-SYSTEM PROGRAMMING CONTROLLER
JTAG PORT
1
CONTROLLER
54
FUNCTION
I/O
18
BLOCK 1
Macrocells
I/O
1 to 18
I/O
I/O
54
FUNCTION
18
BLOCK 2
Macrocells
I/O
1 to 18
BLOCKS
I/O
54
I/O
FUNCTION
18
BLOCK 3
I/O
Macrocells
1 to 18
I/O
3
I/O/GCK
54
1
FUNCTION
I/O/GSR
18
BLOCK 4
2
Macrocells
I/O/GTS
1 to 18
IC13 : SN74AHCT245PWR
IC6–9 : TC74HC151AF
8 to 1 Data Selector
IC24 : SN74LV245APWR
Octal 3-State Bus Transceivers
DIR
1
20 V
CC
A1
2
19 ENG
A2
3
18 B1
16
15
14
13
12
11
10
9
A3
4
17 B2
D4
D5 D6 D7 A
B
A4
5
16 B3
D3
C
15 B4
A5
6
D2 D1 D0 Y
W
S
A6
7
14 B5
1
2
3
4
5
6
7
8
A7
8
13 B6
A8
9
12 B7
GND
10
11 B8
INPUTS
OUTPUTS
SELECT
STROBE
Y
W
C
B
A
S
X
X
X
H
L
H
L
L
L
L
D0
D0
L
L
H
L
D1
D1
L
H
L
L
D2
D2
L
H
H
L
D3
D3
H
L
L
L
D4
D4
H
L
H
L
D5
D5
H
H
L
L
D6
D6
H
H
H
L
D7
D7
* All voltages are measured with a 10M Ω /V DC electronic volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to those
originally installed.
* Schematic diagram is subject to change without notice.
131