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Circuit Emulation Services Overview
Synchronous Residual Time Stamp Clocking Mode
Synchronous residual time stamp (SRTS) clocking requires a PRS and network clock synchronization
services. SRTS, which can be used only for unstructured services, carries asynchronous DS1 circuits. In
this case, the input service clock frequency must be recovered at the output CES-IWF. SRTS is one of
the clocking modes that can be used for recovering this clock frequency.
The SRTS clocking mode, which requires a network-wide reference clock, measures the service clock
input frequency against a network-wide synchronization signal that must be present in the CES-IWF,
and sends different signals, called residual time stamps, in the AAL1 header to the reassembly IWF. At
the output IWF, the differences can be combined with the network-wide synchronization signal, to
re-create the input service clock. The network-wide reference clock is described in the
Distribution in a Cisco 7200 Series Router or a Cisco uBR7200 series" section on page
Adaptive Clocking Mode
Adaptive clocking mode requires neither a PRS nor network clock synchronization services for effective
handling of CBR traffic. However, as is the case with SRTS clocking, adaptive clocking can be used
only for unstructured (clear channel) CES services.
Note
Although this clocking mode is the simplest and easiest to implement in an ATM network, it exhibits
the poorest wander and jitter performance of all the available clocking modes. Therefore, Cisco does not
recommend its use, except in instances where a PRS and network clock synchronization services are not
available.
The term adaptive clocking is used because the rate at which CBR data is propagated through an ATM
network is driven by the rate at which such data is introduced into the network by the user's edge
equipment.
For example, adaptive clocking in an ATM CES port adapter derives timing for data transport by
calculating the "average" rate at which data arrives and conveying that data to the output port of the
module at an equivalent rate. For this reason, the actual rate of CBR data flow through the network may
vary when adaptive clocking is used, depending on how rapidly CBR data is being introduced into the
network.
CBR data transport through the network occurs in a "pseudo synchronous" manner that ensures the
integrity of the data.
Rather than using a clocking signal to convey CBR traffic through an ATM network, adaptive clocking
obtains appropriate timing for data transport by calculating an average data rate for the CBR traffic.
For example, if CBR data is arriving at an ATM CES port adapter at a rate of so many bits per second,
then that rate is used, in effect, to govern the flow of CBR data through the network. Meanwhile,
however, the ATM CES port adapter automatically calculates the average data rate by means of
microcode (firmware) built into the board. This calculation occurs while user data traverses the network.
When the ATM CES port adapter senses that its segmentation and reassembly (SAR) buffer is filling up,
it increases the rate of the transmit (TX) clock for its output port, thereby "draining" the buffer.
Similarly, the ATM CES port adapter slows down the transmit clock of its output port if it senses that
the buffer is being "drained" faster than CBR data is being received. In this manner, adaptive clocking
attempts to minimize wide variations in SAR buffer loading while providing an effective means of
propagating CBR traffic through the network.
PA-A2 ATM CES Port Adapter Installation and Configuration
1-12
Chapter 1
Overview: PA-A2 ATM CES Port Adapter
"Network Clock
1-9.
OL-3460-01
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