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IBM DJSA-210 - Travelstar 10 GB Hard Drive Specifications
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IBM DJSA-210 - Travelstar 10 GB Hard Drive Specifications

2.5 inch ata/ide hard disk drive
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Hard disk drive specifications

Travelstar 32GH, 30GT & 20GN
2.5 inch ATA/IDE hard disk drive
Models:
DJSA-232
DJSA-230
DJSA-220
Revision 4.0
S07N-3499-05
DJSA-210
DJSA-205
IBM
7 December 2001
Publication #1520

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Summary of Contents for IBM DJSA-210 - Travelstar 10 GB Hard Drive

  • Page 1: Hard Disk Drive Specifications

    Hard disk drive specifications Travelstar 32GH, 30GT & 20GN 2.5 inch ATA/IDE hard disk drive Models: DJSA-232 DJSA-210 DJSA-230 DJSA-205 DJSA-220 Revision 4.0 7 December 2001 S07N-3499-05 Publication #1520...
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  • Page 3 IBM storage products - official published specifications Hard disk drive specifications Travelstar 32GH, 30GT & 20GN 2.5 inch ATA/IDE hard disk drive Models: DJSA-232 DJSA-210 DJSA-230 DJSA-205 DJSA-220 Revision 4.0 7 December 2001 S07N-3499-05 Publication #1520...
  • Page 4 IBM may have patents or pending patent applications covering subject matter in this document. The furnishing of this document does not give you any license to these patents. You can send license inquiries, in writing, to the IBM Director of Commercial Relations, IBM Corporation, Armonk, NY 10577.

  • Page 5: Table Of Contents

    Table of contents List of figures ............
  • Page 6 ..........6.5 Mechanical specifications .
  • Page 7 ........... 10.2 Command Register .
  • Page 8 ..........11.10.2 Identify Device Data .
  • Page 9 ..........13.35 Write Buffer (E8h) .
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  • Page 11: List Of Figures

    List of figures ......... . . Figure 1.
  • Page 12 ......... . . Figure 50.
  • Page 13 ....... . . Figure 96. Security Erase Unit command (F4h) .
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  • Page 15: Introduction

    1.0 Introduction This document describes the specifications of the following IBM 2.5 inch, ATA/IDE interface hard disk drives: • DJSA-232 (32 GB) • DJSA-230 (30 GB) • DJSA-220 (20 GB) • DJSA-210 (10 GB) • DJSA-205 (5 GB) Part 1 of this document defines the hardware functional specification. For details about the interface specification refer to Part 2 of this document.
  • Page 16 hard disk drive hertz Input integrated lead suspension imped impedance Input/Output International Standards Organization 1,000 bytes Mbits/sec 1,000,000 bits per second Kbpi 1,000 Bit Per Inch kgf-cm kilogram (force)-centimeter kilohertz logical block addressing unit of A-weighted sound power meter max. or Max. maximum 1,000,000 bytes Mbps...

  • Page 17: References

    watt 3-state transistor-transistor tristate logic 1.2 References ! ATA/ATAPI-5 (T13/1321D Revision D) 1.3 General caution ! Do not apply force to the top cover (See Figure 1 on page 4). ! Do not cover the breathing hole on the top cover (See Figure 1 on page 4). ! Do not touch the interface connector pins or the surface of the printed circuit board.

  • Page 18: Drive Handling Precautions

    1.4 Drive handling precautions Do not press on the drive cover during handling. Figure 1. Drive handling precautions Travelstar 32GH/30GT/20GN hard disk drive specifications...

  • Page 19: General Features

    2.0 General features ! Height MCC Compliance ! (DJSA-232/230) 2.5 inch, 12.5±0.2 mm ! (DJSA-220/210/205) 2.5 inch, 9.5±0.2 mm ! Drive formatted capacity by model number ! (DJSA-232) 32 GB ! (DJSA-230) 30 GB ! (DJSA-220) 20 GB ! (DJSA-210) 10 GB ! (DJSA-205) 5 GB ! 512 bytes/sector ! AT Interface (Enhanced IDE) conforming to ATA-4...
  • Page 20 ! Power on to ready ! 5.0 sec (DJSA-232) ! 3.3 sec (DJSA-230) ! 3.0 sec (DJSA-220/210/205) ! Nonoperating Shock ! 700 G 1ms (DJSA-232/230) ! 800 G 1 ms (DJSA-220/210/205) ! Operating Shock ! 150 G 2 ms (DJSA-232) ! 175 G 2 ms (DJSA-230/220/210/205) ! Address Offset Feature to support DFT implementation Note: Mounting screw position is...

  • Page 21: Part 1. Functional Specification

    Part 1. Functional specification Travelstar 32GH/30GT/20GN hard disk drive specifications...
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  • Page 23: Fixed Disk Subsystem Description

    3.0 Fixed disk subsystem description 3.1 Control Electronics The control electronics works with the following functions. ! AT Interface Protocol ! Embedded Sector Servo ! No-ID formatting ! Multizone recording ! Code: 32/34 ! ECC on-the-fly ! Enhanced Adaptive Battery Life Extender 3.2 Head disk assembly data The following technologies are used in each DJSA-XXX model.
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  • Page 25: Fixed Disk Characteristics

    4.0 Fixed disk characteristics 4.1 Default logical drive parameters The following table lists the default logical drive parameters by drive model number. Model Capacity Word 1 Word 3 Word 6 Word Customer Usable (GB) (Cyl) (Head) (Sect/Trk) 60–61 Data Bytes (LBA) DJSA-232 16,383...

  • Page 26: Data Sheet

    4.3 Data sheet DJSA-232 DJSA-230/220/210/205 Rotational Speed (RPM) 5400 4200 Data transfer rates (buffer to/from media) 120-223 Mbps 109-203 Mbps Interface transfer rate (MB/sec) 66.6 MB/sec 66.6 MB/sec ULTRA DMA 66 Recording density (Kbpi) (Max.) Track density (Ktpi) Areal density (Gb/sq.in.)(Max.) 14.4 17.1 Number of zones...

  • Page 27: Performance Characteristics

    4.5 Performance characteristics File performance is characterized by the following parameters: ! Command Overhead ! Mechanical Positioning ! Seek Time ! Latency ! Data Transfer Speed ! Buffering Operation (Look ahead/Write Cache) Note: All the above parameters contribute to file performance. There are other parameters which contri- bute to the performance of the actual system.

  • Page 28: Mechanical Positioning

    4.5.2 Mechanical positioning 4.5.2.1 Average seek time (including settling) Command Type Typical (ms) Max. (ms) Read Write Figure 7. Mechanical positioning performance Typical and Max. are defined throughout the performance specification as follows: Typical Average of the drive population tested at nominal environmental and voltage conditions. Max.

  • Page 29: Figure 9. Single Track Seek Time

    4.5.2.3 Single track seek time (without command overhead, including settling) Command Type Typical (ms) Maximum (ms) Read Write Figure 9. Single track seek time Single track seek is measured as the average of one (1) single track seek from every track in both directions (inward and outward).

  • Page 30: Operating Modes

    4.5.3 Operating modes Operating mode Description Spin-Up: Start up time period from spindle stop or power down. Seek: Seek operation mode Write: Write operation mode Read: Read operation mode Performance: The device is capable of responding immediately to idle media access requests. All electronic components remain powered and the full frequency servo remains operational.
  • Page 31 4.5.3.3 Adaptive power save control The transient timing from Performance Idle mode to Active Idle mode, from Active Idle mode to Low Power Idle mode, and from Low Power Idle mode to Standby mode is controlled adaptively according to the access pattern of the host system in order to reduce the average power dissipation.
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  • Page 33: Data Integrity

    5.0 Data integrity 5.1 Data loss on power off ! Data loss will not be caused by a power off during any operation but the write operation. ! A power off during a write operation causes the loss of any received or resident data that has not been written onto the disk media.

  • Page 34: Write Safety

    5.4 WRITE safety The drive ensures that the data is written into the disk media properly. The following conditions are monitored during a write operation. When one of these conditions exceeds the criteria, the write operation is terminated and the automatic retry sequence is invoked. ! Head off track ! External shock ! Low supply voltage...

  • Page 35: Ecc

    5.8 ECC The 40 byte three interleaved ECC processor provides user data verification and correction capability. The first 4 bytes of ECC are check bytes for user data and the other 36 bytes are Read Solomon ECC. Each interleave has 12 bytes for ECC. Hardware logic corrects up to 15 bytes (5 bytes for each interleave) errors on-the-fly.
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  • Page 37: Specification

    6.0 Specification 6.1 Environment 6.1.1 Temperature and humidity Operating conditions Temperature 5 to 55°C (See Note) Relative humidity 8 to 90% noncondensing Maximum wet bulb temperature 29.4°C noncondensing Maximum temperature gradient 20°C/hour Altitude –300 to 3048 m (10,000 ft) Nonoperating conditions Temperature –40 to 65°C Relative humidity...

  • Page 38: Magnetic Fields

    6.1.1.1 Corrosion test The hard disk drive must be functional and show no signs of corrosion after being exposed to a temperature humidity stress of 50°C/90%RH (relative humidity) for one week followed by a temperature humidity drop to 25°C/40%RH in 2 hours. 6.1.2 Magnetic fields The disk drive will withstand radiation and conductive noise within the limits shown below.

  • Page 39: Dc Power Requirements

    6.2 DC power requirements Connection to the product should be made in isolated secondary circuits (SELV). The voltage specifica- tions are applied at the power connector of the drive. Item Requirements Notes Nominal Supply +5 Volt dc Power Supply Ripple (0–20 MHz) 100 mV p-p max.

  • Page 40: Energy Consumption Efficiency

    6.2.1 Energy consumption efficiency Model Energy consumption efficiency (Watt/Capacity(GB)) DJSA-232/230/220 0.03 DJSA-210/205 0.07 Figure 19. Energy consumption efficiency Note: Energy consumption efficiency is calculated as Power Consumption of Low Power Idle Watt/ Capacity (GB). Startup current DJSA-220/210/205 Figure 20. Typical current wave form at start up of Travelstar 32GH/30GT/20GN hard disk drive specifications...

  • Page 41: Figure 21. Typical Current Wave Form At Start Up Of Djsa-230

    of DJSA-230 Figure 21. Typical current wave form at start up Travelstar 32GH/30GT/20GN hard disk drive specifications...

  • Page 42: Reliability

    Figure 22. Typical current wave form at start up of DJSA-232 6.4 Reliability 6.4.1 Data reliability ! Probability of not recovering data is 1 in 10 bits read. ! ECC implementation. On-the-fly correction—performed as a part of read channel function—recovers up to 15 symbols of error in 1 sector (1 symbol is 8 bits).

  • Page 43: Service Life And Usage Condition

    6.4.4 Service life and usage condition The drive is designed to be used under the following conditions: ! The drive should be operated within specifications of shock, vibration, temperature, humidity, altitude, and magnetic field. ! The drive should be protected from ESD. ! The breathing hole in the top cover of the drive should not be covered.
  • Page 44 Simple power cycling of DJSA-XXX invokes the emergency unload mechanism and subjects the HDD to nontypical mechanical stress. Power cycling testing may be required to test the boot-up function of the system. In this case IBM recommends that the power-off portion of the cycle contain the sequence specified in section 6.4.6.2, "Required Power-Off Sequence”...

  • Page 45: Mechanical Specifications

    6.5 Mechanical specifications 6.5.1 Physical dimensions and weight The following figure lists the dimensions for the 2.5 inch hard disk drive form factor. Model Height (mm) Width (mm) Length (mm) Weight (gram) DJSA-232 12.5±0.2 69.85±0.25 100.2±0.25 155 Max. DJSA-230 12.5±0.2 69.85±0.25 100.2±0.25 135 Max.

  • Page 46: Connector And Jumper Description

    the DJSA-232/230 Figure 25. Mounting hole locations of 6.5.3 Connector and jumper description A jumper is used to designate the drive address as either master or slave. The jumper setting method is described in section 7.10. Connector specifications are included in Part 2 of this document—Electrical Interface specifications. 6.5.4 Mounting orientation The drive will operate in all axes (6 directions) and will stay within the specified error rates when tilted ±5 degrees from these positions.

  • Page 47: Load/Unload Mechanism

    The user should use appropriate screws or equivalent mounting hardware to mount the drive securely enough to prevent excessive motion or vibration of the drive at seek operation or spindle rotation. 6.5.5 Load/unload mechanism The head load/unload mechanism is provided to protect the disk data during shipping, movement, or storage.

  • Page 48: Vibration And Shock

    6.6 Vibration and shock All vibration and shock measurements in this section are for hard disk drives without mounting attach- ments for systems. The input level shall be applied to the normal drive mounting points. Vibration tests and shock tests are to be conducted by mounting the drive to a table using the bottom four mounting holes.

  • Page 49: Nonoperating Vibration

    6.6.2 Nonoperating vibration The disk drive withstands the following vibration levels without any loss or permanent damage. 6.6.2.1 Random vibration The test consists of a random vibration applied in each of three mutually perpendicular axes with the time duration of 15 minutes per axis. The PSD levels for the test simulating the shipping and relocation envi- ronment is shown below.

  • Page 50: Nonoperating Shock

    6.6.4 Nonoperating shock The drive withstands the following half-sine shock pulse without any data loss or permanent damage. Model Duration of 1 ms Duration of 11 ms DJSA-232/230 700 G 120 G DJSA-220/210/205 800 G 120 G Figure 30. Nonoperating shock The shocks are applied for each direction of the drive for three mutually perpendicular axes, one axis at a time.

  • Page 51: Acoustics

    6.7 Acoustics 6.7.1 Sound power level The criteria of A-weighted sound power level are described below. Measurements are to be taken in accordance with ISO 7779. The mean of the sample of 40 drives is to be less than the typical value. Each drive is to be less than the maximum value. The drives are to meet this requirement in both board down orientations.

  • Page 52: Identification Labels

    6.8 Identification labels The following labels are affixed to every disk drive. A label is placed on the top of the HDA containing the statement "Made by IBM" or equivalent, Part No., EC No. and FRU No. A bar code label placed on the disk drive based on user request. The location on the disk drive is to be designated in the drawing provided by the user.

  • Page 53: Safety

    6.10 Safety 6.10.1 UL and CSA approval The product is qualified per UL (Underwriters Labratory) 1950 Third Edition and CAN/CSA C22.2 No.950-M95 Third Edition, for the use in Information Technology Equipment, including Electric Business Equipment. The UL Recognition, or the CSA certification, is maintained for the product life. The UL and C-UL recognition mark •...
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  • Page 55: Electrical Interface Specifications

    7.0 Electrical interface specifications 7.1 Cabling The maximum cable length from the host system to the hard disk drive shall not exceed 18 inches. 7.2 Interface connector The signal connector for AT attachment is designed to mate with the 50 pin plug specified in Annex A, Connectors and Cable Assembly, of the ATA/ATAPI-5 document.

  • Page 56: Signal Definitions

    7.3 Signal definitions The pin assignments of interface signals are listed as follows: SIGNAL Type SIGNAL Type –RESET DD07 3–state DD08 3–state DD06 3–state DD09 3–state DD05 3–state DD10 3–state DD04 3–state DD11 3–state DD03 3–state DD12 3–state DD02 3–state DD13 3–state DD01...

  • Page 57: Signal Descriptions

    Special Definition Conventional Definition (for Ultra DMA) –DDMARDY IORDY Write Operation HSTROBE –DIOR STOP –DIOW –HDMARDY –DIOR Read Operation DSTROBE IORDY STOP –DIOW Figure 34. Special signal definitions for Ultra DMA 7.4 Signal descriptions DD00–DD15 A 16-bit bi-directional data bus between the host and the HDD. The lower 8 lines, DD00-07, are used for Register and ECC access.
  • Page 58 -IOCS16 A signal indicating to the host that a 16-bit wide data register has been addressed and that the drive is prepared to send or receive a 16-bit wide data word. This signal is an Open-Drain output with 24 mA sink capability and an external resistor is needed to pull this line to 5 volts.
  • Page 59 5V Power There are two input pins for the +5 V power supply. One is the "+5 V Logic" input pin and the second is the "+5 V Motor" input pin. These two input pins are tied together within the drive. -DMACK This signal shall be used by the host in response to DMARQ to either acknowledge that data has been accepted, or that data is available.

  • Page 60: Interface Logic Signal Levels

    7.5 Interface logic signal levels The interface logic signals have the following electrical specifications: Inputs : Input High Voltage 2.0 V min./5.5 V max. Input Low Voltage –0.5 V min./0.8 V max. Outputs : Output High Voltage 2.4 V min. Output Low Voltage 0.5 V max.

  • Page 61: Pio Timings

    7.7 PIO timings The PIO cycle timings meet Mode 4 of the ATA-4 description. CS(1:0)- DA(2:0) DIOR-, DIOW- Write data DD(15:0) Read data DD(15:0) t7(*) t8(*) IOCS16-(*) IORDY (*) Up to ATA-2 (mode-0,1,2) PARAMETER DESCRIPTION MIN (ns) MAX. (ns) Cycle time –...

  • Page 62: Multiword Dma Timings

    Multiword DMA timings The Multiword DMA timings meet Mode 2 of the ATA-3 description. DMARQ tLR/tLW DMACK- tKR/tKW DIOR-/DIOW- READ DD(15:0) WRITE DD(15:0) PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time – DIOR-/DIOW- asserted pulse width – DIOR- data access –...

  • Page 63: Ultra Dma Timings

    7.9 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, 3, and 4 of the Ultra DMA Protocol. 7.9.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tZIORDY tCYC tCYC DSTROBE tZAD DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxx RD Data...

  • Page 64: Host Pausing Read Dma

    7.9.2 Host Pausing Read DMA DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) DSTROBE to HDMARDY- time – – – –...

  • Page 65: Host Terminating Read Dma

    7.9.1 Host Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE xxxxxxxxxxxxxxxxxx RD Data xxxxxxxxxxx DD(15:0) tZAH Device drives DD Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns)

  • Page 66: Device Terminating Read Dma

    7.9.2 Device Terminating Read DMA DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE xxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) tZAH Host drives DD Device drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns)

  • Page 67: Initiating Write Dma

    7.9.3 Initiating Write DMA DMARQ DMACK- tENV tACK STOP tZIORDY t2CYC DDMARDY- tCYC tCYC tACK HSTROBE DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns)

  • Page 68: Device Pausing Write Dma

    7.9.4 Device Pausing Write DMA DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) HSTROBE to DDMARDY- time – – – –...

  • Page 69: Figure 44. Ultra Dma Cycle Timings (Device Terminating Write)

    7.9.2.1 Device Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns)

  • Page 70: Host Terminating Write Dma

    7.9.3 Host Terminating Write DMA DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 PARAMETER DESCRIPTION (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) (ns) Time from HSTROBE edge to assertion of...

  • Page 71: Drive Address Setting

    7.10 Drive address setting A jumper is available at the interface connector to determine the drive address. The set position of the jumper is as shown below. Using Cable Selection, the drive address depends on the condition of pin 28 of the AT interface cable. In the case when pin 28 is ground, or low, the drive is a Master.

  • Page 72: Addressing Of Hdd Registers

    7.12 Addressing of HDD registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (-CS0 and -CS1) and three address lines (DA00–02) are used to select one of these registers, while a -DIOR or -DIOW is provided at the specified time.

  • Page 73: Part 2. Interface Specification

    Part 2. Interface specification Travelstar 32GH/30GT/20GN hard disk drive specifications...
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  • Page 75: General

    8.0 General 8.1 Introduction This specification describes the host interface of DJSA-XXX. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-5) Revision 2 dated December 13, 1999, with certain limitations described in section 9.0, "Deviations From Standard” on page 63. DJSA-XXX drives support the following new functions included by ATA/ATAPI-5 standards or newer standards.
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  • Page 77: Deviations From Standard

    9.0 Deviations from standard The device conforms to the referenced specifications, with deviations described below. The interface conforms to the Working Document of Information Technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-5) Revision 2 dated December 13, 1999, with deviation as follows: Standby Timer Standby timer is enabled by STANDBY command or IDLE command.
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  • Page 79: Registers

    10.0 Registers Addresses Functions CS0– CS1– READ (DIOR–) WRITE (DIOW–)) Data bus high imped Not used Control block registers Data bus high imped Not used Data bus high imped Not used Alternate Status Device Control Device Address Not used Command block registers Data Data Error Register...

  • Page 80: Alternate Status Register

    10.1 Alternate Status Register Alternate Status Register Figure 49. Alternate Status Register This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt.

  • Page 81: Data Register

    10.5 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command and the configuration information is transferred on an Identify Device command. All data transfers are 16 bits wide, except for ECC byte transfers, which are 8 bits wide.

  • Page 82: Drive Address Register

    10.7 Drive Address Register Drive Address Register –WTG –H3 –H2 –H1 –H0 –DS1 –DS0 Figure 51. Drive Address Register This register contains the inverted drive select and head select addresses of the currently selected drive. Bit Definitions High Impedance. This bit is not a device and will always be in a high impedance state.

  • Page 83: Error Register

    10.9 Error Register Error Register IDNF ABRT TK0NF AMNF Figure 53. Error Register This register contains the status from the last command executed by the device or a diagnostic code. At the completion of any command, except Execute Device Diagnostic, the contents of this register are always valid even if ERR = 0 is in the Status Register.

  • Page 84: Sector Number Register

    10.12 Sector Number Register This register contains the starting sector number for any disk data access for the subsequent command. The sector number is from one to the maximum number of sectors per track. In LBA mode, this register contains Bits 0–7. At the end of the command, this register is updated to reflect the current LBA Bits 0–7.

  • Page 85: General Operation Descriptions

    11.0 General operation descriptions 11.1 Reset response ATA has the following three types of resets: Power On Reset (POR) The device executes a series of electrical circuitry diagnostics, spins up the HDA, tests speed and other mechanical parametric, and sets default values.

  • Page 86: Figure 55. Reset Response Table

    hard soft reset reset Aborting Host interface – Aborting Device operation – (*1) (*1) Initialization of hardware Internal diagnostic Starting or Spinning Up spindle motor (*6) Initialization of registers (*2) DASP handshake PDIAG handshake Reverting programmed parameters to (*3) default Number of CHS (set by Initialize Device Parameters) Multiple mode...

  • Page 87: Register Initialization

    11.1.1 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Register Default Value Error Diagnostic Code Sector Count Sector Number Cylinder Low Cylinder High Device/Head Status Alternate Status Figure 56.

  • Page 88: Diagnostic And Reset Considerations

    11.2 Diagnostic and Reset considerations The Set Max password, the Set Max security mode and the Set Max unlock counter are not retained over a Power On Reset but are retained over a Hard Reset or Soft Reset. For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset, Hard Reset DASP–...

  • Page 89: Power-Off Considerations

    11.3 Power-off considerations 11.3.1 Load/Unload Load/Unload is a functional mechanism of the HDD. It is controlled by the drive micro code. Specifically, unloading of the heads is invoked by the following commands. Command Standby UL -> Comp. Standby Immediate UL -> Comp. Sleep UL ->...

  • Page 90: Required Power-Off Sequence

    11.3.3 Required power-off sequence Problems can occur on most HDDs when power is removed at an arbitrary time. Examples: Data loss from the write buffer. If the drive is writing a sector, a partially-written sector with an incorrect ECC block results. The sector contents are destroyed, and reading that sector results in a hard error.

  • Page 91: Power Management Features

    LBA addressing mode Logical sectors on the device shall be linearly mapped with the first LBA addressed sector (sector 0) being the same sector as the first logical CHS addressed sector ( cylinder 0, head 0, sector 1). Irrespective of the logical CHS translation mode currently in effect, the LBA address of a given logical sector does not change.

  • Page 92: Standby/Sleep Command Completion Timing

    The sleep command moves a device to sleep mode. The device's interface becomes inactive at the completion of the sleep command. A reset is required to move a device out of sleep mode. When a device exits sleep mode it will enter standby mode. The Standby and Standby Immediate commands move a device to standby mode immediately from the active or idle modes.

  • Page 93: Initial Power Mode At Power On

    Though the interface is inactive in sleep mode, the access to the interface registers and the validity of INTRQ is guaranteed for two seconds after the Sleep command is completed. After this period, the contents of interface registers may be lost. Since the contents of interface registers may be invalid, the host should NOT check the Status register nor the Alternate Status register prior to issuing a soft reset to wake up a device.

  • Page 94: Low Power Idle Mode

    11.6.3 Low Power Idle Mode Power consumption is 60–65% less than that of Performance Idle mode. The heads are unloaded on the ramp, however the spindle is still rotated at the full speed. Recovery time to Active mode is about 300 ms. 11.6.4 Transition Time The transition time is dynamically managed by users recent access pattern, instead of fixed times.

  • Page 95: Attribute Thresholds

    degrading or fault condition existing. There is no implied linear reliability relationship corresponding to the numerical relationship between different attribute values for any particular attribute. 11.7.3 Attribute thresholds Each attribute value has a corresponding attribute threshold limit which is used for direct comparison to the attribute value to indicate the existence of a degrading or faulty condition.

  • Page 96: Security Mode

    The system manufacturer/dealer who intends to enable the device lock function for end users must set the master password even if only single level password protection is required. Otherwise, the 'default' master password which is set by IBM can unlock a device that is locked with a user password. 11.8.4 Master Password Revision Code This Master Password Revision Code is set by Security Set Password command with the master password.

  • Page 97: Figure 61. Initial Setting

    11.8.5.2 User Password setting When a User Password is set, the device will automatically enter lock mode the next time the device is powered on. ( Ref.) < Setting password > < No setting password > Set Password with User Password Normal operation Normal operation Power off...

  • Page 98: Figure 62. Usual Operation

    11.8.5.3 Operation from POR after user password is set When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command is successfully completed. Device Locked mode Unlock CMD Erase Prepare Non-media access Media Access Command (*1) Command (*1) Erase Unit...

  • Page 99: Figure 63. Password Lost

    11.8.5.4 User Password lost If the User Password is forgotten and High level security is set, the system user can't access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.

  • Page 100: Command Table

    11.8.6 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled. Device Device Unlockeod Device Command Locked Mode Mode Frozen Mode Check Power Mode Enable/Disable Delayed Write Execute Device Diagnostic Flush Cache Format Track Format Unit...

  • Page 101: Figure 64. Command Table For Device Lock Operation (2 Of 2)

    Device Device Device Command Locked Mode Unlocked Mode Frozen Mode S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T. Enable Operations S.M.A.R.T. Execute Off-line Immediate S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Return Status S.M.A.R.T. Save Attribute Values Standby Standby Immediate Write Buffer Write DMA (w/o retry) Write DMA (w/retry) Write Long (w/o retry)

  • Page 102: Protected Area Function

    11.9 Protected Area Function Protected Area Function is to provide the 'protected area' which cannot be accessed via conventional methods. This 'protected area' is used to contain critical system data such as BIOS or system management information. The contents of the entire system main memory may also be dumped into the 'protected area' to resume after a system power off.

  • Page 103: Set Max Security Extension Commands

    Test the sectors for protected area (LBA > = 0FC000h) if required. Write information data such as BIOS code within the protected area. Change maximum LBA using Set Max ADDRESS command to 0FBFFFh with nonvolatile option. From this point, the protected area cannot be accessed until next Set Max ADDRESS command is issued.

  • Page 104: Figure 66. Set Max Security Mode Transition

    This command requests a transfer of a single sector of data from the host. The figure shown above defines the content of this sector of information. The password supplied in the sector of data transferred is compared with the stored Set Max password. If the password compare fails, then the device returns command aborted and decrements the unlock counter.

  • Page 105: Address Offset Feature (Vendor Specific)

    11.10 Address Offset Feature (vendor specific) Computer systems perform initial code loading (booting) by reading from a predefined address on a disk drive. To allow an alternate bootable operating system to exist in a reserved area on a disk drive this feature provides a Set Features function to temporarily offset the drive address space.

  • Page 106: Enable/Disable Address Offset Mode

    11.10.1 Enable/Disable Address Offset Mode Subcommand code 09h Enable Address Offset Mode offsets address Cylinder 0, Head 0, Sector 1, LBA 0, to the start of the nonvolatile protected area established using the Set Max Address command. The offset condition is cleared by Subcommand 89h Disable Address Offset Mode, Hardware reset or Power on Reset.

  • Page 107: Exceptions In Address Offset Mode

    11.10.3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error, even if the access protection is removed by a Set Max Address command. Read Look Ahead operation is not carried out, even if it is enabled by the Set Feature command. Travelstar 32GH/30GT/20GN hard disk drive specifications...

  • Page 108: Seek Overlap

    11.11 Seek Overlap DJSA-XXX drives provide accurate seek time measurement method. The seek command is usualy used to measure the device seek time by accumulating execution time for a number of seek commands. With typical implementation of the seek command, this measurement must include the device and host command overhead.

  • Page 109: Write Cache Function

    11.12 Write Cache function Write cache is a performance enhancement whereby the device reports completion of the write command (Write Sectors and Write Multiple) to the host as soon as the device has received all of the data in its buffer.

  • Page 110: Reassign Function

    11.14 Reassign Function The Reassign Function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. The one entry can register 256 consecutive sectors maximum. This reassignment information is registered internally, and the information is available right after completing the reassign function.

  • Page 111: Command Protocol

    12.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0.

  • Page 112: Data Out Commands

    f. The device sets DRQ = 0 after the sector (or block) has been transferred to the host. 4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b. When the sector of data is available for transfer to the host, the device sets BSY = 0, sets DRQ = 1, and interrupts the host.

  • Page 113: Nondata Commands

    Execution includes the transfer of one or more 512 byte (> 512 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head Registers.
  • Page 114 ! Initialize Device Parameters ! Read Native Max ADDRESS ! Read Verify Sectors ! Recalibrate ! Security Erase Prepare ! Security Freeze Lock ! Seek ! Sense Condition ! Set Features ! Set Max ADDRESS ! Set Max LOCK ! Set Max FREEZE LOCK ! Set Multiple Mode ! Sleep ! S.M.A.R.T.

  • Page 115: Dma Data Transfer Commands

    12.4 DMA Data Transfer commands These commands are: ! Identify Device DMA ! Read DMA ! Write DMA Data transfers using DMA commands differ in two ways from PIO transfers: ! Data transfers are performed using the Slave DMA channel ! No intermediate sector interrupts are issued on multisector commands Initiation of the DMA transfer commands is identical to the Read Sector or Write Sector commands.
  • Page 116 This page intentionally left blank.

  • Page 117: Command Descriptions

    13.0 Command descriptions Code Binary Code Bit Protocol Command (Hex) 7 6 5 4 3 2 1 0 Check Power Mode 1 1 1 0 0 1 0 1 Check Power Mode* 1 0 0 1 1 0 0 0 Enable/Disable Delayed Write 1 1 1 1 1 0 1 0 Execute Device Diagnostic...

  • Page 118: Figure 69. Command Set (2 Of 2)

    Code Binary Code Bit Protocol Command (Hex) 7 6 5 4 3 2 1 0 Set Max UNLOCK 1 1 1 1 1 0 0 1 Set Multiple Mode 1 1 0 0 0 1 1 0 Sleep 1 1 1 0 0 1 1 0 Sleep* 1 0 0 1 1 0 0 1 S.M.A.R.T.

  • Page 119: Figure 70. Command Set (Subcommand)

    Command Feature Command (Subcommand) Code Register (Hex) (Hex) (Delayed Write Function) Enable Delayed Write function Disable Delayed Write function (S.M.A.R.T Function) S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T. Save Attribute Values S.M.A.R.T. Execute Off–line Immediate S.M.A.R.T.
  • Page 120 The following symbols are used in the command descriptions: Output Registers This indicates that the bit must be set to 0. This indicates that the bit must be set to 1. The device number bit. Indicates that the device number bit of the Device/Head Register should be specified.

  • Page 121: Check Power Mode (E5H/98H)

    13.1 Check Power Mode (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 122: Enable/Disable Delayed Write (Fah: Vendor Specific)

    13.2 Enable/Disable Delayed Write (FAh: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 123: Execute Device Diagnostic (90H)

    13.3 Execute Device Diagnostic (90h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 124: Flush Cache (E7H)

    13.4 Flush Cache (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 125: Format Track (50H: Vendor Specific)

    13.5 Format Track (50h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 126: Figure 76. Format Track Data Field Format

    This indicates the head number of the track to be formatted. (L = 0) In LBA mode this register specifies that LBA address bits 24–27 are to be formatted. (L = 1) Input Parameters From The Device Sector Number In LBA mode this register specifies the current LBA address bits as 0–7 (L = 1). Cylinder High/Low In LBA mode this register specifies the current LBA address bits as 8–15 (Low) and bits 16–23 (High).

  • Page 127: Format Unit (F7H: Vendor Specific)

    13.6 Format Unit (F7h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 128: Identify Device (Ech)

    The execution time of this command is shown below. DJSA-232 about 39 minutes DJSA-230 about 42 minutes DJSA-220 about 30 minutes DJSA-210 about 16 minutes DJSA-205 about 8 minutes 13.7 Identify Device (ECh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register...

  • Page 129: Figure 79. Identify Device Information (1 Of 7)

    Word Content Description Drive 045AH Bit assignments classification 15(=0) 1=ATAPI device, 0=ATA device 14(=0) 1=format speed tolerance gap required 13(=0) 1=track offset option available 12(=0) 1=data strobe offset option available 11(=0) 1=rotational speed tolerance > 0.5% 10(=1) 1=disk transfer rate > 10 Mbps 9(=0) 1=disk transfer rate >...

  • Page 130: Figure 79. Identify Device Information (2 Of 7)

    Word Content Description 0000H Capable of double word I/O, ‘0000’= cannot perform 0F00H Capabilities, bit assignments: 15-14(=0) Reserved 13(=0) Standby timer value are vendor specific 12(=0) Reserved 11(=1) IORDY Supported 10(=1) IORDY can be disabled 9(=1) Reserved 8(=0) Reserved 7–0(=0) Reserved 0000H Capabilities...

  • Page 131: Figure 79. Identify Device Information (3 Of 7)

    Word Content Description 0003H Flow Control PIO Transfer Modes Supported 15– 8(=0) Reserved 7– 0(=3) Advanced PIO Transfer Modes Supported ‘11’ = PIO Mode 3 and 4 Supported 0003H Flow Control PIO Transfer Modes Supported 15– 8(=0) Reserved 7– 0(=3) Advanced PIO Transfer Modes Supported ‘11’...

  • Page 132: Figure 79. Identify Device Information (4 Of 7)

    Word Content Description 41A8H Command set supported 15(=0) Always 14(=1) Always 13– 9(=0) Reserved 8(=1) 1=SET MAX security extension supported 7(=1) 1=Address Offset feature supported 6(=0) 1=SET FEATURES subcommand required to spin-up 5(=1) 1=Power-Up In Standby feature set supported 4(=0) 1=Removable Media Status Notification Feature Set supported 3(=1)

  • Page 133: Figure 79. Identify Device Information (5 Of 7)

    Word Content Description 00XXH Command set/feature enabled 15– 8(=0) Reserved 7(=X) 1=Address Offset mode enabled 6(=0) 1=SET FEATURES subcommand required to spin-up 5(=0) 1=Power-Up In Standby feature set has been enabled via the SET FEATURES command 4(=0) 1=Removable Media Status Notification Feature Set enabled 3(=X) 1=Advanced Power management...

  • Page 134: Figure 79. Identify Device Information (6 Of 7)

    Word Content Description XXXXH Hardware reset results Device detected result 15(=0) Reserved 14(=1) Always 13(=X) 1=Device detected CBLID- above V 0=Device detected CBLID- below V [12– 8 Device 1 hardware reset result Device 0 clear these bits to 0] 12(=0) Reserved 11(=X) 1=Device 1 passed diagnostic...

  • Page 135: Figure 79. Identify Device Information (7 Of 7)

    Word Content Description 000XH Current Set Feature Option. Bit assignments 15–4(=0) Reserved 3(=X) 1=Auto reassign enabled 2(=X) 1=Reverting enabled 1(=X) 1=Read Look-ahead enabled 0(=X) 1=Write Cache enabled XXXXH Reserved 000XH Initial Power Mode Selection. Bit assignments 15–2(=0) Reserved 1(=1) Always 0(=X) Initial Power Mode 1=Standby, 0=Idle...

  • Page 136: Figure 80. Number Of Cylinders/Heads/Sectors By Models For Djsa-Xxx

    DJSA-232 Number of cylinders 3FFFh Number of heads Buffer size 0EA5h(=1874 KB) Model number (ASCII) IBM-DJSA-232 Total number of user addressable sectors 3B9C460h DJSA-230 Number of cylinders 3FFFh Number of heads Buffer size 0EA5h(=1874 KB) Model number (ASCII) IBM-DJSA-230 Total number of user addressable sectors...

  • Page 137: Identify Device Dma (Eeh)

    13.8 Identify Device DMA (EEh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 138: Idle (E3H/97H)

    13.9 Idle (E3h/97h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data – – – – – – – – Feature –...

  • Page 139: Idle Immediate (E1H/95H)

    13.10 Idle Immediate (E1h/95h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 140: Initialize Device Parameters (91H)

    13.11 Initialize Device Parameters (91h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 141: Read Buffer (E4H)

    13.12 Read Buffer (E4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 142: Read Dma (C8H/C9H)

    13.13 Read DMA (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 143 This indicates the head number of the first sector to be transferred. (L = 0) In LBA mode this register specifies the LBA bits 24–27 to be transferred. (L = 1) This indicates the retry bit. If set to one, then retries are disabled. Input Parameters From The Device Sector Count This indicates the number of requested sectors not transferred.

  • Page 144: Read Long (22H/23H)

    13.14 Read Long (22h/23h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 145 This indicates the retry bit. If it is set to one then retries are disabled. Input Parameters From The Device Sector Count This indicates the number of requested sectors not transferred. Sector Number This indicates the sector number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 0–7.

  • Page 146: Read Multiple (C4H)

    13.15 Read Multiple (C4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 147 Input Parameters From The Device Sector Count This indicates the number of requested sectors not transferred. This number is zero unless an unrecoverable error occurs. Sector Number This indicates the sector number of the last transferred sector. (L = 0) In LBA mode, this register contains the current LBA bits 0–7.

  • Page 148: Read Native Max Address (F8H)

    13.16 Read Native Max ADDRESS (F8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 149 In LBA mode this register contains the native max LBA bits 24–27. (L = 1) In the CHS mode this register contains the native maximum head number. (L = 0) Valid. Indicates that the bit is part of an input parameter and will be set to 0 or 1 by the device.

  • Page 150: Read Sectors (20H/21H)

    13.17 Read Sectors (20h/21h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 151 Input Parameters From The Device Sector Count This is the number of requested sectors not transferred. This will be zero, unless an unrecoverable error occurs. Sector Number This is the sector number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 0–7.

  • Page 152: Read Verify Sectors (40H/41H)

    13.18 Read Verify Sectors (40h/41h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 153 This is the head number of the first sector to be transferred. (L = 0) In LBA mode this register contains the LBA bits 24–27. (L = 1) This is the retry bit. If it is set to one then retries are disabled. Input Parameters From The Device Sector Count This is the number of requested sectors not verified.

  • Page 154: Recalibrate (1Xh)

    13.19 Recalibrate (1xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data – – – – – – – – Feature –...

  • Page 155: Security Disable Password (F6H)

    13.20 Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 156: Security Erase Prepare (F3H)

    13.21 Security Erase Prepare (F3h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 157: Security Erase Unit (F4H)

    13.22 Security Erase Unit (F4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...
  • Page 158 Identifier Zero indicates that the device should check the supplied password against the user password stored internally. One indicates that the device should check the given password against the master password stored internally. The Security Erase Unit command erases all user data and disables the security mode feature (device lock function).

  • Page 159: Security Freeze Lock (F5H)

    13.23 Security Freeze Lock (F5h) Command Block Output Command Block Input Registers Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 160: Security Set Password (F1H)

    13.24 Security Set Password (F1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 161: Figure 100. Security Set Password Information

    Word Description Control Word bit 0 : Identifier (1- Master, 0- User) bit 1–7 : Reserved bit 8 : Security level (1- Maximum, 0- High) bit 9–15 : Reserved 01–16 Password ( 32 bytes ) Master Password Revision Code 17–18 (valid if Word 0 bit 0 = 1) 19–255 Reserved...

  • Page 162: Security Unlock (F2H)

    Identifier = Master / Security level = Maximum This combination will set a master password but will NOT enable the security mode feature (lock function). Travelstar 32GH/30GT/20GN hard disk drive specifications...

  • Page 163: Figure 101. Security Unlock Command (F2H)

    13.25 Security Unlock (F2h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 164: Seek (7Xh)

    Word Description Control Word bit 0 : Identifier (1– Master, 0– User) bit 1–15 : Reserved 01–16 Password ( 32 bytes ) 17–255 Reserved Figure 102. Security Unlock information Identifier A zero indicates that the device regards Password as the User Password. A one indicates that the device regards Password as the Master Password.

  • Page 165: Sense Condition (F0H: Vendor Specific)

    13.26 Seek (7xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data – – – – – – – – Feature –...

  • Page 166: Set Features (Efh)

    13.27 Sense Condition (F0h: vendor specific) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 167: Figure 105. Set Features Command (Efh)

    13.28 Set Features (EFh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 168: Set Max Address (F9H)

    Output Parameters To The Device Feature Destination code for this command. Enable write cache (See note 2) Set transfer mode based on value in sector count register Enable Advanced Power Management Enable Address Offset mode 40 bytes of ECC apply on Read Long/Write Long commands Disable read look-ahead feature Disable reverting to power on defaults Disable write cache...

  • Page 169: Figure 106. Set Max Address (F9H)

    13.29 Set Max ADDRESS (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 170: Set Multiple (C6H)

    Output Parameters To The Device Feature Destination code for this command SET MAX SET PASSWORD SET MAX LOCK SET MAX UNLOCK SET MAX FREEZE LOCK When the Set Max ADDRESS command is executed, this register is ignored. This indicates the option bit for selection whether nonvolatile or volatile. B = 0 is the volatile condition.

  • Page 171: Sleep (E6H/99H)

    13.30 Set Multiple (C6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 172: Function Set (B0H)

    13.31 Sleep (E6h/99h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data – – – – – – – – Feature –...

  • Page 173: Function Subcommands

    13.32 S.M.A.R.T. Function Set (B0h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 174: S.m.a.r.t. Function Subcommands

    S.M.A.R.T. Enable Operations S.M.A.R.T. Disable Operations S.M.A.R.T. Return Status S.M.A.R.T. Enable/Disable Automatic Off-line 13.32.1 S.M.A.R.T. Function Subcommands 13.32.1.1 S.M.A.R.T. Read Attribute Values (subcommand D0h) This subcommand returns the device's Attribute Values to the host. Upon receipt of the S.M.A.R.T. Read Attribute Values subcommand from the host, the device asserts BSY, saves any updated Attribute Values to the Attribute Data sectors, asserts DRQ, clears BSY, asserts INTRQ, and then waits for the host to transfer the 512 bytes of Attribute Value information from the device via the Data Register.

  • Page 175: Figure 110. Log Sector Addresses

    13.32.1.5 S.M.A.R.T. Execute Off-line Immediate (subcommand D4h) This subcommand causes the device to immediately initiate the set of activities that collect Attribute data in an off-line mode (off-line routine) or execute a self-test routine in either captive or off-line mode. The Sector Number register shall be set to specify the operation to be executed.
  • Page 176 13.32.1.7 S.M.A.R.T. Write Log Sector (subcommand D6h) This command writes 512 bytes of data to the specified log sector. The 512 bytes of data are transferred at a command and the Sector Count value shall be set to one. The Sector Number shall be set to specify the log sector address (Figure 109).

  • Page 177: Device Attributes Data Structure

    13.32.1.11 S.M.A.R.T. Enable/Disable Automatic Off-Line (subcommand DBh) This subcommand enables and disables the optional feature that cause the device to perform the set of off-line data collection activities that automatically collect attribute data in an off-line mode and then save this data to the device's nonvolatile memory.

  • Page 178: Figure 111. Device Attribute Data Structure

    13.32.2 Device Attributes Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specification for byte ordering, namely that the least significant byte occupies the lowest numbered byte address location in the field.

  • Page 179: Figure 112. Individual Attribute Data Structure

    13.32.2.2 Individual Attribute Data Structure The following defines the 12 bytes that make up the information for each Attribute entry in the Device Attribute Data Structure. Description Byte Offset Value Attribute ID Number (01h to FFh) binary Status Flags bit flags Bit 0 Pre–Failure/Advisory Bit 1...

  • Page 180: Figure 113. Status Flag Definitions

    Spin Retry Count Device Power Cycle Count Gsense Error Rate Power Off Retract Count Load/Unload Cycle Count Reallocation Event Count Current Pending Sector Count Off-Line Scan Uncorrectable Sector Count Ultra DMA CRC Error Count Status Flag definitions: Flag Name Definition Pre–Failure/ If bit = 0, an Attribute Value less than or equal Advisory bit...
  • Page 181 13.32.2.3 Off-Line Data Collection Status The value of this byte defines the current status of the off-line activities of the device. Bit 7 indicates an Automatic Off-line Data Collection Status. Bit 7 Automatic Off-line Data Collection Status Automatic Off-line Data Collection is disabled. Automatic Off-line Data Collection is enabled.

  • Page 182: Device Attribute Thresholds Data Structure

    13.32.2.7 Off-line data collection capability Bit Definition The Execute Off-line Immediate implemented bit 0 S.M.A.R.T. Execute Off-line Immediate subcommand is not implemented 1 S.M.A.R.T. Execute Off-line Immediate subcommand is implemented Enable/disable Automatic Off-line implemented bit 0 S.M.A.R.T. Enable/disable Automatic Off-line subcommand is not implemented 1 S.M.A.R.T.

  • Page 183: Figure 114. Device Attribute Thresholds Data Structure

    13.32.2.10 Self-test failure check point This byte indicates the section of self-test where the device detected a failure. 13.32.2.11 Self-test completion time These bytes are the minimum time in minutes to complete the self-test. 13.32.2.12 Data Structure Checksum The Data Structure Checksum is the 2's compliment of the result of a simple 8-bit addition of the first 511 bytes in the data structure.

  • Page 184: Error Log Sector

    Attribute Threshold (for comparison with Attribute binary Values from 00h to FFh) 00h – "always passing" threshold value to be used for code test purposes 01h – minimum value for normal operation FDh – maximum value for normal operation FEh – invalid for threshold value FFh –...

  • Page 185: Figure 116. S.m.a.r.t. Error Log Sector

    13.32.4 S.M.A.R.T. error log sector The following defines the 512 bytes that make up the S.M.A.R.T. error log sector. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specifications for byte ordering. Description Byte Offset S.M.A.R.T. error log version Error log pointer 1st error log data structure 2nd error log data structure...

  • Page 186: Figure 117. Error Log Data Structure

    13.32.4.4 Error log data structure The data format of each error log structure is shown below. Description Byte Offset 1st command data structure 2nd command data structure 3rd command data structure 4th command data structure 5th command data structure Error data structure Figure 117.

  • Page 187: Self-Test Log Data Structure

    13.32.4.4.1 Error data structure Data format of error data structure is shown below. Description Byte Offset Reserved Error register Sector count register Sector number register Cylinder Low register Cylinder High register Device/Head register Status register Extended error data (vendor specific) State Life time stamp (hours) Figure 119.

  • Page 188: Error Reporting

    13.32.5 Self-test log data structure The following defines the 512 bytes that make up the Self-test log sector. All multibyte fields shown in these data structures follow the ATA/ATAPI-5 specifications for byte ordering. Description Byte Offset Data structure revision Self-test number n*18h+02h Self-test execution status n*18h+03h...

  • Page 189: Standby (E2H/96H)

    13.32.6 Error reporting The following table shows the values returned in the Status and Error Registers when specific error conditions are encountered by a device. Status Error Error condition Register Register A S.M.A.R.T. FUNCTION SET command was received by the device without the required key being loaded into the Cylinder High and Cylinder Low registers.

  • Page 190: Standby Immediate (E0H/94H)

    13.33 Standby (E2h/96h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data – – – – – – – – Feature –...

  • Page 191: Write Buffer (E8H)

    13.34 Standby Immediate (E0h/94h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 192: Write Dma (Cah/Cbh)

    13.35 Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data – – – – – – – – Data –...

  • Page 193: Figure 125. Write Dma Command (Cah/Cbh)

    13.36 Write DMA (CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...

  • Page 194: Write Long (32H/33H)

    This indicates the head number of the first sector to be transferred. (L = 0) In LBA mode this register contains the LBA bits 24–27. (L = 1) This indicates the retry bit. If the retry bit is set to one then retries are disabled. When the write cache is enabled the retry bit is ignored.

  • Page 195: Figure 126. Write Long Command (32H/33H)

    13.37 Write Long (32h/33h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...

  • Page 196: Write Multiple (C5H)

    This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains the LBA bits 24–27. (L = 1) The retry bit. If the retry bit is set to one, then retries are disabled. Input Parameters From The Device Sector Count This indicates the number of requested sectors not transferred.

  • Page 197: Figure 127. Write Multiple Command (C5H)

    13.38 Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...

  • Page 198: Write Sectors (30H/31H)

    Input Parameters From The Device Sector Count This indicates the number of requested sectors not transferred. The Sector Count will be zero, unless an unrecoverable error occurs. Sector NumberThis indicates the sector number of the last transferred sector. (L = 0) In LBA mode this register contains current the LBA bits 0–7.

  • Page 199: Write Verify (3Ch: Vendor Specific)

    13.39 Write Sectors (30h/31h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 - - - - - - - - - - - - - - - - Data Data - - - - - - - -...
  • Page 200 This indicates the retry bit. If the retry bit is set to one then retries are disabled. When the write cache is enabled the retry bit is ignored. (Ignoring the retry bit is in violation of ATA-3.) Input Parameters From The Device Sector Count This indicates the number of requested sectors not transferred.

  • Page 201: Time-Out Values

    14.0 Time-out values The timing of BSY and DRQ in Status Register are shown in the table below. INTERVAL START STOP TIME-OUT Power On Device Busy Power On Status Register 400 ns After Power On BSY=1 Device Ready Power On Status Register 31 sec After Power On...
  • Page 202 Command category is referred to in section 12.0, "Command protocol" on page 97. We recommend that the host system executes Soft reset and then retry to issue the command if the host system time-out would occur for the device. (Note 1.) For SECURITY ERASE UNIT command, the execution time is referred to 13.22, "Security Erase Unit (F4h)”...

  • Page 203: Appendix

    15.0 Appendix 15.1 Commands Support Coverage Following table is provided to facilitate the understanding of DJSA-XXX command support coverage comparing to the ATA-4 defined command set. The column of 'Implementation' shows the capability of DJSA-XXX for those commands. Command Command Implementation ATA-4 Category Code...

  • Page 204: Figure 130. Command Coverage (2 Of 2)

    Command Command Implementation ATA-4 Command Type Code Name for DJSA-XXX WRITE DMA (w/ retry) Mandatory WRITE DMA (w/o retry) obsoleted WRITE DMA QUEUED Optional CFA WRITE MULTIPLE W/O ERASE Optional – (7) GET MEDIA STATUS Optional (7) MEDIA LOCK Optional (7) MEDIA UNLOCK Optional (7) STANDBY IMMEDIATE...

  • Page 205: Set Features Command Support Coverage

    15.2 SET FEATURES Command Support Coverage The following table provides a list of Feature Registers, Feature Names, and implementation for the DJSA-XXX models. The "Implementation" column indicates with a "Yes" or "No" whether or not the DJSA-XXX models have the capability of executing the command in comparison to the ATA/ATAPI-5 defined command set.
  • Page 206 Travelstar 32GH/30GT/20GN hard disk drive specifications...

  • Page 207: Index

    Index Read Verify Sectors (40h/41h), 138 Recalibrate (1xh), 140 ABLE-3, 79 S.M.A.R.T. Function Set (B0h), 158 ABRT, 69 Security Disable Password (F6h), 141 ABT, 69 Security Erase Prepare (F3h), 142 Active Idle mode, 79 Security Erase Unit (F4h), 143 Adaptive Power Management Feature Security Freeze Lock (F5h), 145 Low Power Idle Mode, 80 Security Set Password (F1h), 146...
  • Page 208 Electromagnetic compatibility, 38 Nonrecovered read errors, 96 Enable/Disable Delayed Write command, 95 Nonrecovered write errors, 20, 96 Environmental condition, 23 ERR, 70 Error Register Operating modes, 16 Diagnostic Codes, 73 Example for operation (In LBA Mode), 88 Execute Device Diagnostic, 109 Performance Idle mode, 79 PIO timings, 47 Power management, 77...
  • Page 209 Sector Number Register, 70 SMART Disable Operations, 100 Status Register, 70 SMART Enable Operations, 100 Register Set, 65 SMART Enable/Disable Attribute Autosave, 100 Reset SMART Execute Off-line Immediate, 100 Diagnostic and reset considerations, 74 SMART Read Attribute Thresholds, 97 Register initialization, 73 SMART Read Attribute Values, 97 Reset error register values, 74 SMART Return Status, 100...
  • Page 210 IBM representative. Data subject to change without notice. References in this publication to IBM products, programs, or services do not imply that IBM intends to make them available in all countries in which IBM operates. Document #S07N-3499-05...

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