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1.7 Outline of Function
Part Number
Item
Internal
ROM
memory
High-speed RAM
Expansion RAM
LCD display RAM
Memory space
General-purpose registers
Minimum instruction execution time
When main system
clock selected
When subsystem
clock selected
Subsystem clock multiplication
function
Instruction set
I/O port
CMOS input
CMOS I/O
N-ch open-drain I/O
A/D converter
LCD controller/driver
Segment signal outputs
Common signal outputs
Serial interface
Notes 1. The capacity of the on-chip flash memory can be changed by means of the memory size switching
register (IMS).
2. Whether a circuit to multiply the clock by 4 is used or not is selected by the subclock select register
(SSCK).
3. 28 pins are used either as a port function or LCD segment output selected by the pin function switching
register.
CHAPTER 1 OUTLINE
µ PD780343
µ PD780344
µ PD780343Y
µ PD780344Y
24 KB
32 KB
(mask ROM)
(mask ROM)
512 bytes
512 bytes
40 × 8 bits
64 KB
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
Function to change minimum instruction execution time provided
0.2 µ s/0.4 µ s/0.8 µ s/1.6 µ s/3.2 µ s (@V
122 µ s (@f
= 32.768 kHz)
XT
30.52 µ s (@f
= 32.768 kHz (131 kHz) with ×4 multiplication clock)
XT
×4 multiplication circuit (operating supply voltage: V
• 16-bit operation
• Multiply/divide (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulate (set, reset, test, and Boolean operation)
• BCD adjust, etc.
66
8
Note 3
52
6 (Middle withstand voltage: 4)
• 8-bit resolution × 8 channels
• Voltage operation:
AV
= 2.2 to 5.5 V
DD
• LCD reference voltage generator: booster type (×3 only)
• Blinking display possible (blinking interval can be selected: 0.5 s or 1 s)
• Static display and dynamic display (1/3 bias only) can be used simultaneously
(Static display up to 12 segments)
Note 3
40 max.
4 max. (dynamic display), 1 (static display)
• 3-wire serial I/O mode (SIO3): 1 channel
• 3-wire serial I/O mode (CSI1): 1 channel
• UART:
2
• I
C bus:
User's Manual U15798EJ2V0UD
µ PD780353
µ PD780354
µ PD780353Y
µ PD780354Y
24 KB
32 KB
(mask ROM)
(mask ROM)
= 5 V, f
= 10 MHz)
DD
X
= 2.7 to 5.5 V)
DD
• 10-bit resolution × 8 channels
• Voltage operation: AV
= 2.2 to 5.5 V
DD
1 channel
1 channel ( µ PD780344Y, 780354Y Subseries only)
(1/2)
µ PD78F0354
µ PD78F0354Y
Note 1
32 KB
(flash memory)
1,024 bytes
Note 2
39
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