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Pin No.
Pin Name
I/O
106
VCD
107
R1
108
R2
109
VDDA4_3.3V
110
VSSA3
111
INP
112
INM
113
FR3
114
FR2
115
FR1
116
Y
117
VDDA3_3.3V
118
VREF
119
BIAS
120
VDDA2_3.3V
121
VSSA2
122
AOUT
123
IREF
124
VSSD2
125
VDDD2_3.3V
126
VRT
127
VDDA1_3.3V
128
RFIN2
129
AIN
130
VSSA1
131
RFIN1
132
VRB
133
VSSD1
134
VDDD1_3.3V
135 to 137
ADC0 to ADC2
138
VDDA0_3.3V
139, 140
ADC3, 4
141
VSSA0
142 to 144
ADC5 to ADC7
145
VDDD0_3.3V
146
VSSD0
147
VRBA
148
VSSA0
149
TESTAA
150
VDDA0_3.3V
151
VRTA
152
VSS
153 to 155
TESTK0 to 2
156
XDSPRST
157
XARPRST
158
VSS
159
MDS0
160
MON
161
MDP0
162
DFCT
I
VCD control input
I
VCD outside resistance 1
I
VCD outside resistance 2
–
Power supply
–
Analog Ground
I
OP amp positive input
I
OP amp negative input
I
Feedback resistance 3
I
Feedback resistance 2
I
Feedback resistance 1
O
OP amp output
–
Power supply
I
DAC referenc voltage input
I
DAC bias input
–
Power supply
–
Analog Ground
O
DAC output
I
Reference current input of DAC
–
Digital Ground
–
Power supply
I
ADC reference input
–
Power supply
I
RF input
I
AMP bias voltage input
–
Analog Ground
I
RF input
I
ADC reference input
–
Digital Ground
–
Power supply
I
ADC input
–
Power supply
I
ADC input
–
Analog ground
I
ADC input
–
Power supply
–
Digital ground
I
ADC reference (Connected ground)
–
Analog ground
O
Not used (Open)
–
Power supply
I
ADC reference input
–
Digital Ground
I
Test terminal (Connected ground)
I
DSP reset signal input
I
Reset signal input
–
Digital Ground
O
CLV speed error output
O
Not used (Open)
O
CLV phase error output
O
Defect detection output
Description
HCD-S400
51
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